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| author | Evan Cheng <evan.cheng@apple.com> | 2009-09-28 09:14:39 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-09-28 09:14:39 +0000 |
| commit | 5adb66a646e2ec32265263739f5b01c3f50c176a (patch) | |
| tree | 38b5fb6a9d2665466cd3b88031122d9c95de6110 /test/CodeGen | |
| parent | 705428ae4a7fa6d97a95f7811fa2e36630a43c9c (diff) | |
| download | external_llvm-5adb66a646e2ec32265263739f5b01c3f50c176a.zip external_llvm-5adb66a646e2ec32265263739f5b01c3f50c176a.tar.gz external_llvm-5adb66a646e2ec32265263739f5b01c3f50c176a.tar.bz2 | |
Make ARM and Thumb2 32-bit immediate materialization into a single 32-bit pseudo
instruction. This makes it re-materializable.
Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@82982 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-mov2.ll | 32 |
1 files changed, 26 insertions, 6 deletions
diff --git a/test/CodeGen/Thumb2/thumb2-mov2.ll b/test/CodeGen/Thumb2/thumb2-mov2.ll index f45defe..a02f4f0 100644 --- a/test/CodeGen/Thumb2/thumb2-mov2.ll +++ b/test/CodeGen/Thumb2/thumb2-mov2.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep movt | grep #1234 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep movt | grep #1234 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep movt | grep #1234 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep movt | grep #1234 -; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep mov | grep movt +; RUN: llc < %s -march=thumb -mattr=+thumb2 | FileCheck %s define i32 @t2MOVTi16_ok_1(i32 %a) { +; CHECK: t2MOVTi16_ok_1: +; CHECK: movs r1, #0 +; CHECK-NEXT: movt r1, #1234 +; CHECK: movw r1, #65535 +; CHECK-NEXT: movt r1, #1234 %1 = and i32 %a, 65535 %2 = shl i32 1234, 16 %3 = or i32 %1, %2 @@ -13,6 +14,11 @@ define i32 @t2MOVTi16_ok_1(i32 %a) { } define i32 @t2MOVTi16_test_1(i32 %a) { +; CHECK: t2MOVTi16_test_1: +; CHECK: movs r1, #0 +; CHECK-NEXT: movt r1, #1234 +; CHECK: movw r1, #65535 +; CHECK-NEXT: movt r1, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3 @@ -24,6 +30,11 @@ define i32 @t2MOVTi16_test_1(i32 %a) { } define i32 @t2MOVTi16_test_2(i32 %a) { +; CHECK: t2MOVTi16_test_2: +; CHECK: movs r1, #0 +; CHECK-NEXT: movt r1, #1234 +; CHECK: movw r1, #65535 +; CHECK-NEXT: movt r1, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3 @@ -36,6 +47,11 @@ define i32 @t2MOVTi16_test_2(i32 %a) { } define i32 @t2MOVTi16_test_3(i32 %a) { +; CHECK: t2MOVTi16_test_3: +; CHECK: movs r1, #0 +; CHECK-NEXT: movt r1, #1234 +; CHECK: movw r1, #65535 +; CHECK-NEXT: movt r1, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3 @@ -50,6 +66,11 @@ define i32 @t2MOVTi16_test_3(i32 %a) { } define i32 @t2MOVTi16_test_nomatch_1(i32 %a) { +; CHECK: t2MOVTi16_test_nomatch_1: +; CHECK: movw r1, #16384 +; CHECK-NEXT: movt r1, #154 +; CHECK: movw r1, #65535 +; CHECK-NEXT: movt r1, #154 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3 @@ -58,7 +79,6 @@ define i32 @t2MOVTi16_test_nomatch_1(i32 %a) { %6 = shl i32 %4, 2 ; This gives us (1234 << 16) in %6 %7 = lshr i32 %6, 3 %8 = or i32 %5, %7 - ret i32 %8 } |