aboutsummaryrefslogtreecommitdiffstats
path: root/test/CodeGen
diff options
context:
space:
mode:
authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2013-02-11 21:37:55 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2013-02-11 21:37:55 +0000
commit71490fa946f750fb3afe7228a32d31d401d4c1d8 (patch)
tree0dc802371b290171237831f9ff44d56a199619cf /test/CodeGen
parent651fb490aeec67c391570cba2a9b184bf390e173 (diff)
downloadexternal_llvm-71490fa946f750fb3afe7228a32d31d401d4c1d8.zip
external_llvm-71490fa946f750fb3afe7228a32d31d401d4c1d8.tar.gz
external_llvm-71490fa946f750fb3afe7228a32d31d401d4c1d8.tar.bz2
Extend Hexagon hardware loop generation to handle various additional cases:
- variety of compare instructions, - loops with no preheader, - arbitrary lower and upper bounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174904 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/Hexagon/hwloop-cleanup.ll86
-rw-r--r--test/CodeGen/Hexagon/hwloop-const.ll31
-rw-r--r--test/CodeGen/Hexagon/hwloop-dbg.ll65
-rw-r--r--test/CodeGen/Hexagon/hwloop-le.ll438
-rw-r--r--test/CodeGen/Hexagon/hwloop-lt.ll438
-rw-r--r--test/CodeGen/Hexagon/hwloop-lt1.ll32
-rw-r--r--test/CodeGen/Hexagon/hwloop-ne.ll438
7 files changed, 1528 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/hwloop-cleanup.ll b/test/CodeGen/Hexagon/hwloop-cleanup.ll
new file mode 100644
index 0000000..6456ebf
--- /dev/null
+++ b/test/CodeGen/Hexagon/hwloop-cleanup.ll
@@ -0,0 +1,86 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; Check that we remove the compare and induction variable instructions
+; after generating hardware loops.
+; Bug 6685.
+
+; CHECK: loop0
+; CHECK-NOT: r{{[0-9]+}}{{.}}={{.}}add(r{{[0-9]+}},{{.}}#-1)
+; CHECK-NOT: cmp.eq
+; CHECK: endloop0
+
+define i32 @test1(i32* nocapture %b, i32 %n) nounwind readonly {
+entry:
+ %cmp1 = icmp sgt i32 %n, 0
+ br i1 %cmp1, label %for.body.preheader, label %for.end
+
+for.body.preheader:
+ br label %for.body
+
+for.body: ; preds = %for.body.preheader, %for.body
+ %sum.03 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
+ %arrayidx.phi = phi i32* [ %arrayidx.inc, %for.body ], [ %b, %for.body.preheader ]
+ %i.02 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
+ %0 = load i32* %arrayidx.phi, align 4
+ %add = add nsw i32 %0, %sum.03
+ %inc = add nsw i32 %i.02, 1
+ %exitcond = icmp eq i32 %inc, %n
+ %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
+ br i1 %exitcond, label %for.end.loopexit, label %for.body
+
+for.end.loopexit:
+ br label %for.end
+
+for.end:
+ %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.end.loopexit ]
+ ret i32 %sum.0.lcssa
+}
+
+; This test checks that that initial loop count value is removed.
+; CHECK-NOT: ={{.}}#40
+; CHECK: loop0
+; CHECK-NOT: r{{[0-9]+}}{{.}}={{.}}add(r{{[0-9]+}},{{.}}#-1)
+; CHECK-NOT: cmp.eq
+; CHECK: endloop0
+
+define i32 @test2(i32* nocapture %b) nounwind readonly {
+entry:
+ br label %for.body
+
+for.body:
+ %sum.02 = phi i32 [ 0, %entry ], [ %add, %for.body ]
+ %arrayidx.phi = phi i32* [ %b, %entry ], [ %arrayidx.inc, %for.body ]
+ %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %0 = load i32* %arrayidx.phi, align 4
+ %add = add nsw i32 %0, %sum.02
+ %inc = add nsw i32 %i.01, 1
+ %exitcond = icmp eq i32 %inc, 40
+ %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret i32 %add
+}
+
+; This test checks that we don't remove the induction variable since it's used.
+; CHECK: loop0
+; CHECK: r{{[0-9]+}}{{.}}={{.}}add(r{{[0-9]+}},{{.}}#1)
+; CHECK-NOT: cmp.eq
+; CHECK: endloop0
+define i32 @test3(i32* nocapture %b) nounwind {
+entry:
+ br label %for.body
+
+for.body:
+ %arrayidx.phi = phi i32* [ %b, %entry ], [ %arrayidx.inc, %for.body ]
+ %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ store i32 %i.01, i32* %arrayidx.phi, align 4
+ %inc = add nsw i32 %i.01, 1
+ %exitcond = icmp eq i32 %inc, 40
+ %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret i32 0
+}
+
+
diff --git a/test/CodeGen/Hexagon/hwloop-const.ll b/test/CodeGen/Hexagon/hwloop-const.ll
new file mode 100644
index 0000000..a621c58
--- /dev/null
+++ b/test/CodeGen/Hexagon/hwloop-const.ll
@@ -0,0 +1,31 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 -O2 < %s | FileCheck %s
+; ModuleID = 'hwloop-const.c'
+target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
+target triple = "hexagon-unknown-linux-gnu"
+
+@b = common global [25000 x i32] zeroinitializer, align 8
+@a = common global [25000 x i32] zeroinitializer, align 8
+@c = common global [25000 x i32] zeroinitializer, align 8
+
+define i32 @hwloop_bug() nounwind {
+entry:
+ br label %for.body
+
+; CHECK: endloop
+for.body: ; preds = %for.body, %entry
+ %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds [25000 x i32]* @b, i32 0, i32 %i.02
+ store i32 %i.02, i32* %arrayidx, align 4, !tbaa !0
+ %arrayidx1 = getelementptr inbounds [25000 x i32]* @a, i32 0, i32 %i.02
+ store i32 %i.02, i32* %arrayidx1, align 4, !tbaa !0
+ %inc = add nsw i32 %i.02, 1
+ %exitcond = icmp eq i32 %inc, 25000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret i32 0
+}
+
+!0 = metadata !{metadata !"int", metadata !1}
+!1 = metadata !{metadata !"omnipotent char", metadata !2}
+!2 = metadata !{metadata !"Simple C/C++ TBAA"}
diff --git a/test/CodeGen/Hexagon/hwloop-dbg.ll b/test/CodeGen/Hexagon/hwloop-dbg.ll
new file mode 100644
index 0000000..eaffa07
--- /dev/null
+++ b/test/CodeGen/Hexagon/hwloop-dbg.ll
@@ -0,0 +1,65 @@
+; RUN: llc < %s -march=hexagon -mcpu=hexagonv4 -O2 -disable-lsr | FileCheck %s
+; ModuleID = 'hwloop-dbg.o'
+target datalayout = "e-p:32:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
+target triple = "hexagon"
+
+define void @foo(i32* nocapture %a, i32* nocapture %b) nounwind {
+entry:
+ tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13), !dbg !17
+ tail call void @llvm.dbg.value(metadata !{i32* %b}, i64 0, metadata !14), !dbg !18
+ tail call void @llvm.dbg.value(metadata !2, i64 0, metadata !15), !dbg !19
+ br label %for.body, !dbg !19
+
+for.body: ; preds = %for.body, %entry
+; CHECK: loop0(
+; CHECK-NOT: add({{r[0-9]*}}, #
+; CHECK: endloop0
+ %arrayidx.phi = phi i32* [ %a, %entry ], [ %arrayidx.inc, %for.body ]
+ %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
+ %b.addr.01 = phi i32* [ %b, %entry ], [ %incdec.ptr, %for.body ]
+ %incdec.ptr = getelementptr inbounds i32* %b.addr.01, i32 1, !dbg !21
+ tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14), !dbg !21
+ %0 = load i32* %b.addr.01, align 4, !dbg !21, !tbaa !23
+ store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21, !tbaa !23
+ %inc = add nsw i32 %i.02, 1, !dbg !26
+ tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15), !dbg !26
+ %exitcond = icmp eq i32 %inc, 10, !dbg !19
+ %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1
+ br i1 %exitcond, label %for.end, label %for.body, !dbg !19
+
+for.end: ; preds = %for.body
+ ret void, !dbg !27
+}
+
+declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
+
+!llvm.dbg.cu = !{!0}
+
+!0 = metadata !{i32 786449, i32 0, i32 12, metadata !"hwloop-dbg.c", metadata !"/usr2/kparzysz/s.hex/t", metadata !"QuIC LLVM Hexagon Clang version 6.1-pre-unknown, (git://git-hexagon-aus.quicinc.com/llvm/clang-mainline.git e9382867661454cdf44addb39430741578e9765c) (llvm/llvm-mainline.git 36412bb1fcf03ed426d4437b41198bae066675ac)", i1 true, i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1} ; [ DW_TAG_compile_unit ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c] [DW_LANG_C99]
+!1 = metadata !{metadata !2}
+!2 = metadata !{i32 0}
+!3 = metadata !{metadata !4}
+!4 = metadata !{metadata !5}
+!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (i32*, i32*)* @foo, null, null, metadata !11, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [foo]
+!6 = metadata !{i32 786473, metadata !"hwloop-dbg.c", metadata !"/usr2/kparzysz/s.hex/t", null} ; [ DW_TAG_file_type ]
+!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ]
+!8 = metadata !{null, metadata !9, metadata !9}
+!9 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] [line 0, size 32, align 32, offset 0] [from int]
+!10 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed]
+!11 = metadata !{metadata !12}
+!12 = metadata !{metadata !13, metadata !14, metadata !15}
+!13 = metadata !{i32 786689, metadata !5, metadata !"a", metadata !6, i32 16777217, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [a] [line 1]
+!14 = metadata !{i32 786689, metadata !5, metadata !"b", metadata !6, i32 33554433, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [b] [line 1]
+!15 = metadata !{i32 786688, metadata !16, metadata !"i", metadata !6, i32 2, metadata !10, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [i] [line 2]
+!16 = metadata !{i32 786443, metadata !5, i32 1, i32 26, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c]
+!17 = metadata !{i32 1, i32 15, metadata !5, null}
+!18 = metadata !{i32 1, i32 23, metadata !5, null}
+!19 = metadata !{i32 3, i32 8, metadata !20, null}
+!20 = metadata !{i32 786443, metadata !16, i32 3, i32 3, metadata !6, i32 1} ; [ DW_TAG_lexical_block ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c]
+!21 = metadata !{i32 4, i32 5, metadata !22, null}
+!22 = metadata !{i32 786443, metadata !20, i32 3, i32 28, metadata !6, i32 2} ; [ DW_TAG_lexical_block ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c]
+!23 = metadata !{metadata !"int", metadata !24}
+!24 = metadata !{metadata !"omnipotent char", metadata !25}
+!25 = metadata !{metadata !"Simple C/C++ TBAA"}
+!26 = metadata !{i32 3, i32 23, metadata !20, null}
+!27 = metadata !{i32 6, i32 1, metadata !16, null}
diff --git a/test/CodeGen/Hexagon/hwloop-le.ll b/test/CodeGen/Hexagon/hwloop-le.ll
new file mode 100644
index 0000000..9c8cec7
--- /dev/null
+++ b/test/CodeGen/Hexagon/hwloop-le.ll
@@ -0,0 +1,438 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 -O3 < %s | FileCheck %s
+
+
+; CHECK: test_pos1_ir_sle
+; CHECK: loop0
+; a < b
+define void @test_pos1_ir_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 28395, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 28395, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_ir_sle
+; CHECK: loop0
+; a < b
+define void @test_pos2_ir_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 9073, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 9073, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_ir_sle
+; CHECK: loop0
+; a < b
+define void @test_pos4_ir_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 21956, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 21956, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_ir_sle
+; CHECK: loop0
+; a < b
+define void @test_pos8_ir_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 16782, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 16782, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_ir_sle
+; CHECK: loop0
+; a < b
+define void @test_pos16_ir_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 19097, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 19097, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos1_ri_sle
+; CHECK: loop0
+; a < b
+define void @test_pos1_ri_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, 14040
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp sle i32 %inc, 14040
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_ri_sle
+; CHECK: loop0
+; a < b
+define void @test_pos2_ri_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, 13710
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp sle i32 %inc, 13710
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_ri_sle
+; CHECK: loop0
+; a < b
+define void @test_pos4_ri_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, 9920
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp sle i32 %inc, 9920
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_ri_sle
+; CHECK: loop0
+; a < b
+define void @test_pos8_ri_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, 18924
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp sle i32 %inc, 18924
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_ri_sle
+; CHECK: loop0
+; a < b
+define void @test_pos16_ri_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, 11812
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp sle i32 %inc, 11812
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos1_rr_sle
+; CHECK: loop0
+; a < b
+define void @test_pos1_rr_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_rr_sle
+; CHECK: loop0
+; a < b
+define void @test_pos2_rr_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_rr_sle
+; CHECK: loop0
+; a < b
+define void @test_pos4_rr_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_rr_sle
+; CHECK: loop0
+; a < b
+define void @test_pos8_rr_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_rr_sle
+; CHECK: loop0
+; a < b
+define void @test_pos16_rr_sle(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp sle i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp sle i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
diff --git a/test/CodeGen/Hexagon/hwloop-lt.ll b/test/CodeGen/Hexagon/hwloop-lt.ll
new file mode 100644
index 0000000..7e43733
--- /dev/null
+++ b/test/CodeGen/Hexagon/hwloop-lt.ll
@@ -0,0 +1,438 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 -O3 < %s | FileCheck %s
+
+
+; CHECK: test_pos1_ir_slt
+; CHECK: loop0
+; a < b
+define void @test_pos1_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 8531, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 8531, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_ir_slt
+; CHECK: loop0
+; a < b
+define void @test_pos2_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 9152, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 9152, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_ir_slt
+; CHECK: loop0
+; a < b
+define void @test_pos4_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 18851, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 18851, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_ir_slt
+; CHECK: loop0
+; a < b
+define void @test_pos8_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 25466, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 25466, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_ir_slt
+; CHECK: loop0
+; a < b
+define void @test_pos16_ir_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 9295, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 9295, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos1_ri_slt
+; CHECK: loop0
+; a < b
+define void @test_pos1_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 31236
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp slt i32 %inc, 31236
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_ri_slt
+; CHECK: loop0
+; a < b
+define void @test_pos2_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 22653
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp slt i32 %inc, 22653
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_ri_slt
+; CHECK: loop0
+; a < b
+define void @test_pos4_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 1431
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp slt i32 %inc, 1431
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_ri_slt
+; CHECK: loop0
+; a < b
+define void @test_pos8_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 22403
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp slt i32 %inc, 22403
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_ri_slt
+; CHECK: loop0
+; a < b
+define void @test_pos16_ri_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 21715
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp slt i32 %inc, 21715
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos1_rr_slt
+; CHECK: loop0
+; a < b
+define void @test_pos1_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_rr_slt
+; CHECK: loop0
+; a < b
+define void @test_pos2_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_rr_slt
+; CHECK: loop0
+; a < b
+define void @test_pos4_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_rr_slt
+; CHECK: loop0
+; a < b
+define void @test_pos8_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_rr_slt
+; CHECK: loop0
+; a < b
+define void @test_pos16_rr_slt(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp slt i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
diff --git a/test/CodeGen/Hexagon/hwloop-lt1.ll b/test/CodeGen/Hexagon/hwloop-lt1.ll
new file mode 100644
index 0000000..cf58740
--- /dev/null
+++ b/test/CodeGen/Hexagon/hwloop-lt1.ll
@@ -0,0 +1,32 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
+; Check that we generate a hardware loop instruction.
+; CHECK: endloop0
+
+@A = common global [400 x i8] zeroinitializer, align 8
+@B = common global [400 x i8] zeroinitializer, align 8
+@C = common global [400 x i8] zeroinitializer, align 8
+
+define void @run() nounwind {
+entry:
+ br label %polly.loop_body
+
+polly.loop_after: ; preds = %polly.loop_body
+ ret void
+
+polly.loop_body: ; preds = %entry, %polly.loop_body
+ %polly.loopiv16 = phi i32 [ 0, %entry ], [ %polly.next_loopiv, %polly.loop_body ]
+ %polly.next_loopiv = add i32 %polly.loopiv16, 4
+ %p_vector_iv14 = or i32 %polly.loopiv16, 1
+ %p_vector_iv3 = add i32 %p_vector_iv14, 1
+ %p_vector_iv415 = or i32 %polly.loopiv16, 3
+ %p_arrayidx = getelementptr [400 x i8]* @A, i32 0, i32 %polly.loopiv16
+ %p_arrayidx5 = getelementptr [400 x i8]* @A, i32 0, i32 %p_vector_iv14
+ %p_arrayidx6 = getelementptr [400 x i8]* @A, i32 0, i32 %p_vector_iv3
+ %p_arrayidx7 = getelementptr [400 x i8]* @A, i32 0, i32 %p_vector_iv415
+ store i8 123, i8* %p_arrayidx, align 1
+ store i8 123, i8* %p_arrayidx5, align 1
+ store i8 123, i8* %p_arrayidx6, align 1
+ store i8 123, i8* %p_arrayidx7, align 1
+ %0 = icmp slt i32 %polly.next_loopiv, 400
+ br i1 %0, label %polly.loop_body, label %polly.loop_after
+}
diff --git a/test/CodeGen/Hexagon/hwloop-ne.ll b/test/CodeGen/Hexagon/hwloop-ne.ll
new file mode 100644
index 0000000..bceef2a
--- /dev/null
+++ b/test/CodeGen/Hexagon/hwloop-ne.ll
@@ -0,0 +1,438 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv4 -O3 < %s | FileCheck %s
+
+
+; CHECK: test_pos1_ir_ne
+; CHECK: loop0
+; a < b
+define void @test_pos1_ir_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 32623, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 32623, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_ir_ne
+; CHECK: loop0
+; a < b
+define void @test_pos2_ir_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 29554, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 29554, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_ir_ne
+; CHECK: loop0
+; a < b
+define void @test_pos4_ir_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 15692, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 15692, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_ir_ne
+; CHECK: loop0
+; a < b
+define void @test_pos8_ir_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 10449, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 10449, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_ir_ne
+; CHECK: loop0
+; a < b
+define void @test_pos16_ir_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 32087, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ 32087, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos1_ri_ne
+; CHECK: loop0
+; a < b
+define void @test_pos1_ri_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 3472
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp ne i32 %inc, 3472
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_ri_ne
+; CHECK: loop0
+; a < b
+define void @test_pos2_ri_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 8730
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp ne i32 %inc, 8730
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_ri_ne
+; CHECK: loop0
+; a < b
+define void @test_pos4_ri_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 1493
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp ne i32 %inc, 1493
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_ri_ne
+; CHECK: loop0
+; a < b
+define void @test_pos8_ri_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 1706
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp ne i32 %inc, 1706
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_ri_ne
+; CHECK: loop0
+; a < b
+define void @test_pos16_ri_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, 1886
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp ne i32 %inc, 1886
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos1_rr_ne
+; CHECK: loop0
+; a < b
+define void @test_pos1_rr_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 1
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos2_rr_ne
+; CHECK: loop0
+; a < b
+define void @test_pos2_rr_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 2
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos4_rr_ne
+; CHECK: loop0
+; a < b
+define void @test_pos4_rr_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 4
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos8_rr_ne
+; CHECK: loop0
+; a < b
+define void @test_pos8_rr_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 8
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+
+; CHECK: test_pos16_rr_ne
+; CHECK: loop0
+; a < b
+define void @test_pos16_rr_ne(i8* nocapture %p, i32 %a, i32 %b) nounwind {
+entry:
+ %cmp3 = icmp slt i32 %a, %b
+ br i1 %cmp3, label %for.body.lr.ph, label %for.end
+
+for.body.lr.ph: ; preds = %entry
+ br label %for.body
+
+for.body: ; preds = %for.body.lr.ph, %for.body
+ %i.04 = phi i32 [ %a, %for.body.lr.ph ], [ %inc, %for.body ]
+ %arrayidx = getelementptr inbounds i8* %p, i32 %i.04
+ %0 = load i8* %arrayidx, align 1
+ %conv = zext i8 %0 to i32
+ %add = add nsw i32 %conv, 1
+ %conv1 = trunc i32 %add to i8
+ store i8 %conv1, i8* %arrayidx, align 1
+ %inc = add nsw i32 %i.04, 16
+ %cmp = icmp ne i32 %inc, %b
+ br i1 %cmp, label %for.body, label %for.end
+
+for.end: ; preds = %for.body, %entry
+ ret void
+}
+
+
+