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| author | Evan Cheng <evan.cheng@apple.com> | 2009-01-07 02:08:57 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-01-07 02:08:57 +0000 |
| commit | 8f90b6eb2fd0125f5b779de80954944f9071fb87 (patch) | |
| tree | 4403ff075f0b061b7ba6286c8d30421b1dba012a /test/CodeGen | |
| parent | d37eaa3b9768f464323ace16e6aecda605ba3f49 (diff) | |
| download | external_llvm-8f90b6eb2fd0125f5b779de80954944f9071fb87.zip external_llvm-8f90b6eb2fd0125f5b779de80954944f9071fb87.tar.gz external_llvm-8f90b6eb2fd0125f5b779de80954944f9071fb87.tar.bz2 | |
The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:
v1024 = EDI // not killed
=
= EDI
One possible solution is for the coalescer to examine the sub-register live intervals in the same manner as the physical register. Another possibility is to examine defs and uses (when needed) of sub-registers. Both solutions are too expensive. For now, look for "short virtual intervals" and scan instructions to look for conflict instead.
This is a small win on x86-64. e.g. It shaves 403.gcc by ~80 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61847 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/phys_subreg_coalesce.ll | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/test/CodeGen/X86/phys_subreg_coalesce.ll b/test/CodeGen/X86/phys_subreg_coalesce.ll new file mode 100644 index 0000000..789a4ba --- /dev/null +++ b/test/CodeGen/X86/phys_subreg_coalesce.ll @@ -0,0 +1,24 @@ +; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl + + %struct.dpoint = type { double, double } + +define %struct.dpoint @midpoint(i64 %p1.0, i64 %p2.0) nounwind readnone { +entry: + %0 = trunc i64 %p1.0 to i32 ; <i32> [#uses=1] + %1 = sitofp i32 %0 to double ; <double> [#uses=1] + %2 = trunc i64 %p2.0 to i32 ; <i32> [#uses=1] + %3 = sitofp i32 %2 to double ; <double> [#uses=1] + %4 = add double %1, %3 ; <double> [#uses=1] + %5 = mul double %4, 5.000000e-01 ; <double> [#uses=1] + %6 = lshr i64 %p1.0, 32 ; <i64> [#uses=1] + %7 = trunc i64 %6 to i32 ; <i32> [#uses=1] + %8 = sitofp i32 %7 to double ; <double> [#uses=1] + %9 = lshr i64 %p2.0, 32 ; <i64> [#uses=1] + %10 = trunc i64 %9 to i32 ; <i32> [#uses=1] + %11 = sitofp i32 %10 to double ; <double> [#uses=1] + %12 = add double %8, %11 ; <double> [#uses=1] + %13 = mul double %12, 5.000000e-01 ; <double> [#uses=1] + %mrv3 = insertvalue %struct.dpoint undef, double %5, 0 ; <%struct.dpoint> [#uses=1] + %mrv4 = insertvalue %struct.dpoint %mrv3, double %13, 1 ; <%struct.dpoint> [#uses=1] + ret %struct.dpoint %mrv4 +} |