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authorScott Michel <scottm@aero.org>2007-12-19 07:35:06 +0000
committerScott Michel <scottm@aero.org>2007-12-19 07:35:06 +0000
commit9999e685ea86e9cb8c8d59bfb2f3f4c20acc4de4 (patch)
tree64fdb28243554d91576855e5370eb6ecf61c5f3a /test/CodeGen
parent83870769c60b878fe03c04b853164b7404fa506f (diff)
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Add new immed16.ll test case, fix CellSPU errata to make test case work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/CellSPU/immed16.ll38
1 files changed, 38 insertions, 0 deletions
diff --git a/test/CodeGen/CellSPU/immed16.ll b/test/CodeGen/CellSPU/immed16.ll
new file mode 100644
index 0000000..19cabc4
--- /dev/null
+++ b/test/CodeGen/CellSPU/immed16.ll
@@ -0,0 +1,38 @@
+; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
+; RUN: grep "ilh" %t1.s | count 5
+
+define i16 @test_1() {
+ %x = alloca i16, align 16
+ store i16 419, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_2() {
+ %x = alloca i16, align 16
+ store i16 1023, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_3() {
+ %x = alloca i16, align 16
+ store i16 -1023, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_4() {
+ %x = alloca i16, align 16
+ store i16 32767, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_5() {
+ %x = alloca i16, align 16
+ store i16 -32768, i16* %x ;; ILH via pattern
+ ret i16 0
+}
+
+define i16 @test_6() {
+ ret i16 0
+}
+
+