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authorDan Gohman <gohman@apple.com>2008-03-07 20:36:53 +0000
committerDan Gohman <gohman@apple.com>2008-03-07 20:36:53 +0000
commit9ed06db5c800c347b3ceac70df420f66c62e11c1 (patch)
treeccd8a7ce549011aacc1b713b01836ed27ae26865 /test/CodeGen
parent8419dd6aa6e8a26307222bdda473ac4bdccbb693 (diff)
downloadexternal_llvm-9ed06db5c800c347b3ceac70df420f66c62e11c1.zip
external_llvm-9ed06db5c800c347b3ceac70df420f66c62e11c1.tar.gz
external_llvm-9ed06db5c800c347b3ceac70df420f66c62e11c1.tar.bz2
Add support for lowering 128-bit shifts on ppc64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48029 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/PowerPC/shift128.ll14
1 files changed, 14 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/shift128.ll b/test/CodeGen/PowerPC/shift128.ll
new file mode 100644
index 0000000..cf5b3fc
--- /dev/null
+++ b/test/CodeGen/PowerPC/shift128.ll
@@ -0,0 +1,14 @@
+; RUN: llvm-as < %s | llc -march=ppc64 | grep sld | count 5
+
+define i128 @foo_lshr(i128 %x, i128 %y) {
+ %r = lshr i128 %x, %y
+ ret i128 %r
+}
+define i128 @foo_ashr(i128 %x, i128 %y) {
+ %r = ashr i128 %x, %y
+ ret i128 %r
+}
+define i128 @foo_shl(i128 %x, i128 %y) {
+ %r = shl i128 %x, %y
+ ret i128 %r
+}