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authorDan Gohman <gohman@apple.com>2010-01-05 17:55:26 +0000
committerDan Gohman <gohman@apple.com>2010-01-05 17:55:26 +0000
commitaceba31b7a04fd28680209b2677915378877bc13 (patch)
tree14ccb6bb44f8ffb397c928e23771b50c43688ea4 /test/CodeGen
parentba25f0924ef3be887fb67ed6a66f3dee77461f44 (diff)
downloadexternal_llvm-aceba31b7a04fd28680209b2677915378877bc13.zip
external_llvm-aceba31b7a04fd28680209b2677915378877bc13.tar.gz
external_llvm-aceba31b7a04fd28680209b2677915378877bc13.tar.bz2
Delete useless trailing semicolons.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92740 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/ARM/private.ll2
-rw-r--r--test/CodeGen/ARM/tail-opts.ll2
-rw-r--r--test/CodeGen/Alpha/private.ll2
-rw-r--r--test/CodeGen/Blackfin/ct32.ll6
-rw-r--r--test/CodeGen/Blackfin/ct64.ll6
-rw-r--r--test/CodeGen/Blackfin/ctlz16.ll6
-rw-r--r--test/CodeGen/Blackfin/ctpop16.ll6
-rw-r--r--test/CodeGen/Blackfin/cttz16.ll6
-rw-r--r--test/CodeGen/CellSPU/dp_farith.ll2
-rw-r--r--test/CodeGen/CellSPU/private.ll2
-rw-r--r--test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll2
-rw-r--r--test/CodeGen/MSP430/bit.ll8
-rw-r--r--test/CodeGen/Mips/private.ll2
-rw-r--r--test/CodeGen/PowerPC/private.ll2
-rw-r--r--test/CodeGen/SPARC/private.ll2
-rw-r--r--test/CodeGen/Thumb2/thumb2-add.ll16
-rw-r--r--test/CodeGen/X86/darwin-bzero.ll2
-rw-r--r--test/CodeGen/X86/extractelement-shuffle.ll10
-rw-r--r--test/CodeGen/X86/mul-legalize.ll2
-rw-r--r--test/CodeGen/X86/private.ll2
-rw-r--r--test/CodeGen/X86/tail-opts.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-22.ll2
-rw-r--r--test/CodeGen/X86/vec_shuffle-25.ll18
-rw-r--r--test/CodeGen/X86/vec_shuffle-26.ll6
-rw-r--r--test/CodeGen/X86/widen_select-1.ll2
-rw-r--r--test/CodeGen/X86/widen_shuffle-1.ll2
-rw-r--r--test/CodeGen/X86/widen_shuffle-2.ll2
-rw-r--r--test/CodeGen/XCore/2009-03-27-v2f64-param.ll2
-rw-r--r--test/CodeGen/XCore/private.ll2
29 files changed, 63 insertions, 63 deletions
diff --git a/test/CodeGen/ARM/private.ll b/test/CodeGen/ARM/private.ll
index 03376a4..fba56b4 100644
--- a/test/CodeGen/ARM/private.ll
+++ b/test/CodeGen/ARM/private.ll
@@ -12,7 +12,7 @@ define private void @foo() {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() {
call void @foo()
diff --git a/test/CodeGen/ARM/tail-opts.ll b/test/CodeGen/ARM/tail-opts.ll
index 1a867a9..17c8bae 100644
--- a/test/CodeGen/ARM/tail-opts.ll
+++ b/test/CodeGen/ARM/tail-opts.ll
@@ -9,7 +9,7 @@ declare i1 @qux()
@GHJK = global i32 0
-declare i8* @choose(i8*, i8*);
+declare i8* @choose(i8*, i8*)
; BranchFolding should tail-duplicate the indirect jump to avoid
; redundant branching.
diff --git a/test/CodeGen/Alpha/private.ll b/test/CodeGen/Alpha/private.ll
index 96ab4eb..26076e0 100644
--- a/test/CodeGen/Alpha/private.ll
+++ b/test/CodeGen/Alpha/private.ll
@@ -12,7 +12,7 @@ define private void @foo() {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() {
call void @foo()
diff --git a/test/CodeGen/Blackfin/ct32.ll b/test/CodeGen/Blackfin/ct32.ll
index e9b66eb..363286d 100644
--- a/test/CodeGen/Blackfin/ct32.ll
+++ b/test/CodeGen/Blackfin/ct32.ll
@@ -6,15 +6,15 @@ declare i32 @llvm.ctpop.i32(i32)
define i32 @ctlztest(i32 %B) {
%b = call i32 @llvm.ctlz.i32( i32 %B )
- ret i32 %b;
+ ret i32 %b
}
define i32 @cttztest(i32 %B) {
%b = call i32 @llvm.cttz.i32( i32 %B )
- ret i32 %b;
+ ret i32 %b
}
define i32 @ctpoptest(i32 %B) {
%b = call i32 @llvm.ctpop.i32( i32 %B )
- ret i32 %b;
+ ret i32 %b
}
diff --git a/test/CodeGen/Blackfin/ct64.ll b/test/CodeGen/Blackfin/ct64.ll
index ac4bdcf..7502434 100644
--- a/test/CodeGen/Blackfin/ct64.ll
+++ b/test/CodeGen/Blackfin/ct64.ll
@@ -6,15 +6,15 @@ declare i64 @llvm.ctpop.i64(i64)
define i64 @ctlztest(i64 %B) {
%b = call i64 @llvm.ctlz.i64( i64 %B )
- ret i64 %b;
+ ret i64 %b
}
define i64 @cttztest(i64 %B) {
%b = call i64 @llvm.cttz.i64( i64 %B )
- ret i64 %b;
+ ret i64 %b
}
define i64 @ctpoptest(i64 %B) {
%b = call i64 @llvm.ctpop.i64( i64 %B )
- ret i64 %b;
+ ret i64 %b
}
diff --git a/test/CodeGen/Blackfin/ctlz16.ll b/test/CodeGen/Blackfin/ctlz16.ll
index 56a65c0..eb4af23 100644
--- a/test/CodeGen/Blackfin/ctlz16.ll
+++ b/test/CodeGen/Blackfin/ctlz16.ll
@@ -4,15 +4,15 @@ declare i16 @llvm.ctlz.i16(i16)
define i16 @ctlztest(i16 %B) {
%b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
define i16 @ctlztest_z(i16 zeroext %B) {
%b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
define i16 @ctlztest_s(i16 signext %B) {
%b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
diff --git a/test/CodeGen/Blackfin/ctpop16.ll b/test/CodeGen/Blackfin/ctpop16.ll
index cbbb3d9..8b6c07e 100644
--- a/test/CodeGen/Blackfin/ctpop16.ll
+++ b/test/CodeGen/Blackfin/ctpop16.ll
@@ -4,15 +4,15 @@ declare i16 @llvm.ctpop.i16(i16)
define i16 @ctpoptest(i16 %B) {
%b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
define i16 @ctpoptest_z(i16 zeroext %B) {
%b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
define i16 @ctpoptest_s(i16 signext %B) {
%b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
diff --git a/test/CodeGen/Blackfin/cttz16.ll b/test/CodeGen/Blackfin/cttz16.ll
index 05fe9bf..510882a 100644
--- a/test/CodeGen/Blackfin/cttz16.ll
+++ b/test/CodeGen/Blackfin/cttz16.ll
@@ -4,15 +4,15 @@ declare i16 @llvm.cttz.i16(i16)
define i16 @cttztest(i16 %B) {
%b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
define i16 @cttztest_z(i16 zeroext %B) {
%b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
define i16 @cttztest_s(i16 signext %B) {
%b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b;
+ ret i16 %b
}
diff --git a/test/CodeGen/CellSPU/dp_farith.ll b/test/CodeGen/CellSPU/dp_farith.ll
index b0a372b..66bff3e 100644
--- a/test/CodeGen/CellSPU/dp_farith.ll
+++ b/test/CodeGen/CellSPU/dp_farith.ll
@@ -83,7 +83,7 @@ define double @d_fnms_2(double %arg1, double %arg2, double %arg3) {
; FNMS: - (a * b - c) => c - (a * b)
define <2 x double> @d_fnms_vec_1(<2 x double> %arg1, <2 x double> %arg2, <2 x double> %arg3) {
%A = fmul <2 x double> %arg1, %arg2
- %B = fsub <2 x double> %arg3, %A ;
+ %B = fsub <2 x double> %arg3, %A
ret <2 x double> %B
}
diff --git a/test/CodeGen/CellSPU/private.ll b/test/CodeGen/CellSPU/private.ll
index 7452276..56f72e7 100644
--- a/test/CodeGen/CellSPU/private.ll
+++ b/test/CodeGen/CellSPU/private.ll
@@ -13,7 +13,7 @@ define private void @foo() {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() {
call void @foo()
diff --git a/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll b/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
index 9a9c1a1..45b561a 100644
--- a/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
+++ b/test/CodeGen/Generic/2009-03-29-SoftFloatVectorExtract.ll
@@ -1,7 +1,7 @@
; RUN: llc < %s -soft-float
; PR3899
-@m = external global <2 x double>;
+@m = external global <2 x double>
define double @vector_ex() nounwind {
%v = load <2 x double>* @m
diff --git a/test/CodeGen/MSP430/bit.ll b/test/CodeGen/MSP430/bit.ll
index 2c78366..cd664a1 100644
--- a/test/CodeGen/MSP430/bit.ll
+++ b/test/CodeGen/MSP430/bit.ll
@@ -2,8 +2,8 @@
target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"
target triple = "msp430-generic-generic"
-@foo8 = external global i8;
-@bar8 = external global i8;
+@foo8 = external global i8
+@bar8 = external global i8
define i8 @bitbrr(i8 %a, i8 %b) nounwind {
%t1 = and i8 %a, %b
@@ -83,8 +83,8 @@ define i8 @bitbmm() nounwind {
; CHECK: bitbmm:
; CHECK: bit.b &bar8, &foo8
-@foo16 = external global i16;
-@bar16 = external global i16;
+@foo16 = external global i16
+@bar16 = external global i16
define i16 @bitwrr(i16 %a, i16 %b) nounwind {
%t1 = and i16 %a, %b
diff --git a/test/CodeGen/Mips/private.ll b/test/CodeGen/Mips/private.ll
index a1b45c2..34b7547 100644
--- a/test/CodeGen/Mips/private.ll
+++ b/test/CodeGen/Mips/private.ll
@@ -12,7 +12,7 @@ define private void @foo() {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() {
call void @foo()
diff --git a/test/CodeGen/PowerPC/private.ll b/test/CodeGen/PowerPC/private.ll
index d6e6770..f9405f6 100644
--- a/test/CodeGen/PowerPC/private.ll
+++ b/test/CodeGen/PowerPC/private.ll
@@ -15,7 +15,7 @@ define private void @foo() nounwind {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() nounwind {
call void @foo()
diff --git a/test/CodeGen/SPARC/private.ll b/test/CodeGen/SPARC/private.ll
index 8fa3e7e..f091aa6 100644
--- a/test/CodeGen/SPARC/private.ll
+++ b/test/CodeGen/SPARC/private.ll
@@ -12,7 +12,7 @@ define private void @foo() {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() {
call void @foo()
diff --git a/test/CodeGen/Thumb2/thumb2-add.ll b/test/CodeGen/Thumb2/thumb2-add.ll
index d42ea71..5e25cf6 100644
--- a/test/CodeGen/Thumb2/thumb2-add.ll
+++ b/test/CodeGen/Thumb2/thumb2-add.ll
@@ -8,43 +8,43 @@
; RUN: llc < %s -march=thumb -mattr=+thumb2 | grep add | grep lsl | grep #8
define i32 @t2ADDrc_255(i32 %lhs) {
- %Rd = add i32 %lhs, 255;
+ %Rd = add i32 %lhs, 255
ret i32 %Rd
}
define i32 @t2ADDrc_256(i32 %lhs) {
- %Rd = add i32 %lhs, 256;
+ %Rd = add i32 %lhs, 256
ret i32 %Rd
}
define i32 @t2ADDrc_257(i32 %lhs) {
- %Rd = add i32 %lhs, 257;
+ %Rd = add i32 %lhs, 257
ret i32 %Rd
}
define i32 @t2ADDrc_4094(i32 %lhs) {
- %Rd = add i32 %lhs, 4094;
+ %Rd = add i32 %lhs, 4094
ret i32 %Rd
}
define i32 @t2ADDrc_4095(i32 %lhs) {
- %Rd = add i32 %lhs, 4095;
+ %Rd = add i32 %lhs, 4095
ret i32 %Rd
}
define i32 @t2ADDrc_4096(i32 %lhs) {
- %Rd = add i32 %lhs, 4096;
+ %Rd = add i32 %lhs, 4096
ret i32 %Rd
}
define i32 @t2ADDrr(i32 %lhs, i32 %rhs) {
- %Rd = add i32 %lhs, %rhs;
+ %Rd = add i32 %lhs, %rhs
ret i32 %Rd
}
define i32 @t2ADDrs(i32 %lhs, i32 %rhs) {
%tmp = shl i32 %rhs, 8
- %Rd = add i32 %lhs, %tmp;
+ %Rd = add i32 %lhs, %tmp
ret i32 %Rd
}
diff --git a/test/CodeGen/X86/darwin-bzero.ll b/test/CodeGen/X86/darwin-bzero.ll
index a3c1e6f..a9573cf 100644
--- a/test/CodeGen/X86/darwin-bzero.ll
+++ b/test/CodeGen/X86/darwin-bzero.ll
@@ -3,6 +3,6 @@
declare void @llvm.memset.i32(i8*, i8, i32, i32)
define void @foo(i8* %p, i32 %len) {
- call void @llvm.memset.i32(i8* %p, i8 0, i32 %len, i32 1);
+ call void @llvm.memset.i32(i8* %p, i8 0, i32 %len, i32 1)
ret void
}
diff --git a/test/CodeGen/X86/extractelement-shuffle.ll b/test/CodeGen/X86/extractelement-shuffle.ll
index 12a2ef3..d1ba9a8 100644
--- a/test/CodeGen/X86/extractelement-shuffle.ll
+++ b/test/CodeGen/X86/extractelement-shuffle.ll
@@ -6,8 +6,8 @@
; through the 3rd mask element, which doesn't exist.
define i32 @update(<2 x i64> %val1, <2 x i64> %val2) nounwind readnone {
entry:
- %shuf = shufflevector <2 x i64> %val1, <2 x i64> %val2, <2 x i32> <i32 0, i32 3>;
- %bit = bitcast <2 x i64> %shuf to <4 x i32>;
- %res = extractelement <4 x i32> %bit, i32 3;
- ret i32 %res;
-} \ No newline at end of file
+ %shuf = shufflevector <2 x i64> %val1, <2 x i64> %val2, <2 x i32> <i32 0, i32 3>
+ %bit = bitcast <2 x i64> %shuf to <4 x i32>
+ %res = extractelement <4 x i32> %bit, i32 3
+ ret i32 %res
+}
diff --git a/test/CodeGen/X86/mul-legalize.ll b/test/CodeGen/X86/mul-legalize.ll
index eca9e6f..069737d 100644
--- a/test/CodeGen/X86/mul-legalize.ll
+++ b/test/CodeGen/X86/mul-legalize.ll
@@ -19,6 +19,6 @@ return:
ret void
}
-declare i1 @report__equal(i32 %x, i32 %y) nounwind;
+declare i1 @report__equal(i32 %x, i32 %y) nounwind
declare void @abort()
diff --git a/test/CodeGen/X86/private.ll b/test/CodeGen/X86/private.ll
index 22b6f35..f52f8c7 100644
--- a/test/CodeGen/X86/private.ll
+++ b/test/CodeGen/X86/private.ll
@@ -11,7 +11,7 @@ define private void @foo() {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() {
call void @foo()
diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll
index 8c3cae9..c5dbb04 100644
--- a/test/CodeGen/X86/tail-opts.ll
+++ b/test/CodeGen/X86/tail-opts.ll
@@ -55,7 +55,7 @@ altret:
ret void
}
-declare i8* @choose(i8*, i8*);
+declare i8* @choose(i8*, i8*)
; BranchFolding should tail-duplicate the indirect jump to avoid
; redundant branching.
diff --git a/test/CodeGen/X86/vec_shuffle-22.ll b/test/CodeGen/X86/vec_shuffle-22.ll
index 1cf37d4..6807e4d 100644
--- a/test/CodeGen/X86/vec_shuffle-22.ll
+++ b/test/CodeGen/X86/vec_shuffle-22.ll
@@ -9,7 +9,7 @@ define <4 x float> @t1(<4 x float> %a) nounwind {
define <4 x i32> @t2(<4 x i32>* %a) nounwind {
; CHECK: pshufd
; CHECK: ret
- %tmp1 = load <4 x i32>* %a;
+ %tmp1 = load <4 x i32>* %a
%tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> < i32 0, i32 1, i32 0, i32 1 > ; <<4 x i32>> [#uses=1]
ret <4 x i32> %tmp2
}
diff --git a/test/CodeGen/X86/vec_shuffle-25.ll b/test/CodeGen/X86/vec_shuffle-25.ll
index 2aa2d25..d9b2388 100644
--- a/test/CodeGen/X86/vec_shuffle-25.ll
+++ b/test/CodeGen/X86/vec_shuffle-25.ll
@@ -19,16 +19,16 @@ entry:
%unpcklps8 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=2]
%unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
%unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
- %unpcklps14a = shufflevector <4 x float> %unpcklps14, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>;
+ %unpcklps14a = shufflevector <4 x float> %unpcklps14, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
%unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
- %unpckhps17a = shufflevector <4 x float> %unpckhps17, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>;
- %r1 = shufflevector <16 x float> %unpcklps14a, <16 x float> %unpckhps17a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>;
+ %unpckhps17a = shufflevector <4 x float> %unpckhps17, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ %r1 = shufflevector <16 x float> %unpcklps14a, <16 x float> %unpckhps17a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
%unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
- %unpcklps20a = shufflevector <4 x float> %unpcklps20, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>;
- %r2 = shufflevector <16 x float> %r1, <16 x float> %unpcklps20a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>;
+ %unpcklps20a = shufflevector <4 x float> %unpcklps20, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ %r2 = shufflevector <16 x float> %r1, <16 x float> %unpcklps20a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 12, i32 13, i32 14, i32 15>
%unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
- %unpckhps23a = shufflevector <4 x float> %unpckhps23, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>;
- %r3 = shufflevector <16 x float> %r2, <16 x float> %unpckhps23a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>;
- %r4 = shufflevector <16 x float> %r3, <16 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>;
- ret <8 x float> %r4;
+ %unpckhps23a = shufflevector <4 x float> %unpckhps23, <4 x float> undef, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
+ %r3 = shufflevector <16 x float> %r2, <16 x float> %unpckhps23a, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19>
+ %r4 = shufflevector <16 x float> %r3, <16 x float> undef, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
+ ret <8 x float> %r4
}
diff --git a/test/CodeGen/X86/vec_shuffle-26.ll b/test/CodeGen/X86/vec_shuffle-26.ll
index 8cc15d1..086af6b 100644
--- a/test/CodeGen/X86/vec_shuffle-26.ll
+++ b/test/CodeGen/X86/vec_shuffle-26.ll
@@ -20,10 +20,10 @@ entry:
%unpckhps11 = shufflevector <4 x float> %p1, <4 x float> %p3, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=2]
%unpcklps14 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
%unpckhps17 = shufflevector <4 x float> %unpcklps, <4 x float> %unpcklps8, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
- %r1 = shufflevector <4 x float> %unpcklps14, <4 x float> %unpckhps17, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >;
+ %r1 = shufflevector <4 x float> %unpcklps14, <4 x float> %unpckhps17, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
%unpcklps20 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x float>> [#uses=1]
%unpckhps23 = shufflevector <4 x float> %unpckhps, <4 x float> %unpckhps11, <4 x i32> < i32 2, i32 6, i32 3, i32 7 > ; <<4 x float>> [#uses=1]
- %r2 = shufflevector <4 x float> %unpcklps20, <4 x float> %unpckhps23, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >;
+ %r2 = shufflevector <4 x float> %unpcklps20, <4 x float> %unpckhps23, <8 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7 >
; %r3 = shufflevector <8 x float> %r1, <8 x float> %r2, <16 x i32> < i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15 >;
- ret <8 x float> %r2;
+ ret <8 x float> %r2
}
diff --git a/test/CodeGen/X86/widen_select-1.ll b/test/CodeGen/X86/widen_select-1.ll
index 4154433..d9de892 100644
--- a/test/CodeGen/X86/widen_select-1.ll
+++ b/test/CodeGen/X86/widen_select-1.ll
@@ -6,7 +6,7 @@
define void @select(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind {
entry:
%x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2
- %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >;
+ %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 >
store <6 x i32> %val, <6 x i32>* %dst.addr
ret void
}
diff --git a/test/CodeGen/X86/widen_shuffle-1.ll b/test/CodeGen/X86/widen_shuffle-1.ll
index dd02241..47dba4b 100644
--- a/test/CodeGen/X86/widen_shuffle-1.ll
+++ b/test/CodeGen/X86/widen_shuffle-1.ll
@@ -7,7 +7,7 @@
define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
entry:
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 1, i32 2>
- %val = fadd <3 x float> %x, %src2;
+ %val = fadd <3 x float> %x, %src2
store <3 x float> %val, <3 x float>* %dst.addr
ret void
}
diff --git a/test/CodeGen/X86/widen_shuffle-2.ll b/test/CodeGen/X86/widen_shuffle-2.ll
index d097e41..9374a02 100644
--- a/test/CodeGen/X86/widen_shuffle-2.ll
+++ b/test/CodeGen/X86/widen_shuffle-2.ll
@@ -7,7 +7,7 @@
define void @shuf(<3 x float>* %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
entry:
%x = shufflevector <3 x float> %src1, <3 x float> %src2, <3 x i32> < i32 0, i32 4, i32 2>
- %val = fadd <3 x float> %x, %src2;
+ %val = fadd <3 x float> %x, %src2
store <3 x float> %val, <3 x float>* %dst.addr
ret void
}
diff --git a/test/CodeGen/XCore/2009-03-27-v2f64-param.ll b/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
index a6b9699..e35a36a 100644
--- a/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
+++ b/test/CodeGen/XCore/2009-03-27-v2f64-param.ll
@@ -2,5 +2,5 @@
; PR3898
define i32 @vector_param(<2 x double> %x) nounwind {
- ret i32 1;
+ ret i32 1
}
diff --git a/test/CodeGen/XCore/private.ll b/test/CodeGen/XCore/private.ll
index 9a2f5b3..c595a6d 100644
--- a/test/CodeGen/XCore/private.ll
+++ b/test/CodeGen/XCore/private.ll
@@ -12,7 +12,7 @@ define private void @foo() {
ret void
}
-@baz = private global i32 4;
+@baz = private global i32 4
define i32 @bar() {
call void @foo()