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authorDaniel Sanders <daniel.sanders@imgtec.com>2013-09-24 13:33:07 +0000
committerDaniel Sanders <daniel.sanders@imgtec.com>2013-09-24 13:33:07 +0000
commitacfa5a203c01d99aac1bdc1e045c08153bcdbbf6 (patch)
treecf4cd051e24f258f85e61dc004a1b1ea017550b2 /test/CodeGen
parentad16ddeb8e07a259d17ef203c9f443f816f6ae7b (diff)
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[mips][msa] Remove the VSPLAT and VSPLATD nodes in favour of matching BUILD_VECTOR.
Most constant BUILD_VECTOR's are matched using ComplexPatterns which cover bitcasted as well as normal vectors. However, it doesn't seem to be possible to match ldi.[bhwd] in a type-agnostic manner (e.g. to support the widest range of immediates, it should be possible to use ldi.b to load v2i64) using TableGen so ldi.[bhwd] is matched using custom code in MipsSEISelDAGToDAG.cpp This made the majority of the constant splat BUILD_VECTOR lowering redundant. The only transformation remaining for constant splats is when an (up-to) 32-bit constant splat is possible but the value does not fit into a 10-bit signed integer. In this case, the BUILD_VECTOR is transformed into a bitcasted BUILD_VECTOR so that fill.[bhw] can be used to splat the vector from a GPR32 register (which is initialized using the usual lui/addui sequence). There are no additional tests since this is a re-implementation of previous functionality. The change is intended to make it easier to implement some of the upcoming instruction selection patches since they can rely on existing support for BUILD_VECTOR's in the DAGCombiner. compare_float.ll changed slightly because a BITCAST is no longer introduced during legalization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191299 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/Mips/msa/compare_float.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/test/CodeGen/Mips/msa/compare_float.ll b/test/CodeGen/Mips/msa/compare_float.ll
index 6bbcea0..287578a 100644
--- a/test/CodeGen/Mips/msa/compare_float.ll
+++ b/test/CodeGen/Mips/msa/compare_float.ll
@@ -17,7 +17,7 @@ define void @false_v4f32(<4 x i32>* %c, <4 x float>* %a, <4 x float>* %b) nounwi
; (setcc $a, $b, SETFALSE) is always folded, so we won't get fcaf:
; CHECK-DAG: ldi.b [[R1:\$w[0-9]+]], 0
- ; CHECK-DAG: st.b [[R1]], 0($4)
+ ; CHECK-DAG: st.w [[R1]], 0($4)
; CHECK: .size false_v4f32
}
@@ -494,7 +494,7 @@ define void @true_v4f32(<4 x i32>* %c, <4 x float>* %a, <4 x float>* %b) nounwin
; (setcc $a, $b, SETTRUE) is always folded, so we won't get fcaf:
; CHECK-DAG: ldi.b [[R1:\$w[0-9]+]], -1
- ; CHECK-DAG: st.b [[R1]], 0($4)
+ ; CHECK-DAG: st.w [[R1]], 0($4)
; CHECK: .size true_v4f32
}