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author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-09 03:04:23 +0000 |
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committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-08-09 03:04:23 +0000 |
commit | b33ea564485b430508ab94cf085fd47d7f0e49b0 (patch) | |
tree | d8e9f29daedf73eedfca4a95b940f60702233bbf /test/CodeGen | |
parent | e5118ab7bb4fe184c2c183002158609e5e812791 (diff) | |
download | external_llvm-b33ea564485b430508ab94cf085fd47d7f0e49b0.zip external_llvm-b33ea564485b430508ab94cf085fd47d7f0e49b0.tar.gz external_llvm-b33ea564485b430508ab94cf085fd47d7f0e49b0.tar.bz2 |
Rename and tidy up tests
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137103 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/X86/avx-256-cmp.ll | 18 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-256-cvt.ll | 21 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-arith.ll (renamed from test/CodeGen/X86/avx-256-arith.ll) | 17 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-basic.ll (renamed from test/CodeGen/X86/avx-256.ll) | 11 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-cmp.ll (renamed from test/CodeGen/X86/avx-cmp-fp.ll) | 16 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-cvt.ll (renamed from test/CodeGen/X86/avx-128.ll) | 53 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-logic.ll (renamed from test/CodeGen/X86/avx-256-logic.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-movdup.ll (renamed from test/CodeGen/X86/avx-256-movdup.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-splat.ll (renamed from test/CodeGen/X86/avx-256-splat.ll) | 0 | ||||
-rw-r--r-- | test/CodeGen/X86/avx-unpack.ll (renamed from test/CodeGen/X86/avx-256-unpack.ll) | 0 |
10 files changed, 66 insertions, 70 deletions
diff --git a/test/CodeGen/X86/avx-256-cmp.ll b/test/CodeGen/X86/avx-256-cmp.ll deleted file mode 100644 index 3323a5b..0000000 --- a/test/CodeGen/X86/avx-256-cmp.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s - -; CHECK: vcmpltps %ymm -; CHECK-NOT: vucomiss -define <8 x i32> @cmp00(<8 x float> %a, <8 x float> %b) nounwind readnone { - %bincmp = fcmp olt <8 x float> %a, %b - %s = sext <8 x i1> %bincmp to <8 x i32> - ret <8 x i32> %s -} - -; CHECK: vcmpltpd %ymm -; CHECK-NOT: vucomisd -define <4 x i64> @cmp01(<4 x double> %a, <4 x double> %b) nounwind readnone { - %bincmp = fcmp olt <4 x double> %a, %b - %s = sext <4 x i1> %bincmp to <4 x i64> - ret <4 x i64> %s -} - diff --git a/test/CodeGen/X86/avx-256-cvt.ll b/test/CodeGen/X86/avx-256-cvt.ll deleted file mode 100644 index d973279..0000000 --- a/test/CodeGen/X86/avx-256-cvt.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s - -; CHECK: vcvtdq2ps %ymm -define <8 x float> @funcA(<8 x i32> %a) nounwind { - %b = sitofp <8 x i32> %a to <8 x float> - ret <8 x float> %b -} - -; CHECK: vcvttps2dq %ymm -define <8 x i32> @funcB(<8 x float> %a) nounwind { - %b = fptosi <8 x float> %a to <8 x i32> - ret <8 x i32> %b -} - -; CHECK: vcvtpd2psy %ymm -; CHECK-NEXT: vcvtpd2psy %ymm -; CHECK-NEXT: vinsertf128 $1 -define <8 x float> @funcC(<8 x double> %b) nounwind { - %a = fptrunc <8 x double> %b to <8 x float> - ret <8 x float> %a -} diff --git a/test/CodeGen/X86/avx-256-arith.ll b/test/CodeGen/X86/avx-arith.ll index 5c512db..553e8ac 100644 --- a/test/CodeGen/X86/avx-256-arith.ll +++ b/test/CodeGen/X86/avx-arith.ll @@ -114,3 +114,20 @@ entry: ret <8 x float> %div.i } +; CHECK: vsqrtss +define float @sqrtA(float %a) nounwind uwtable readnone ssp { +entry: + %conv1 = tail call float @sqrtf(float %a) nounwind readnone + ret float %conv1 +} + +declare double @sqrt(double) readnone + +; CHECK: vsqrtsd +define double @sqrtB(double %a) nounwind uwtable readnone ssp { +entry: + %call = tail call double @sqrt(double %a) nounwind readnone + ret double %call +} + +declare float @sqrtf(float) readnone diff --git a/test/CodeGen/X86/avx-256.ll b/test/CodeGen/X86/avx-basic.ll index 337f142..8a24a58 100644 --- a/test/CodeGen/X86/avx-256.ll +++ b/test/CodeGen/X86/avx-basic.ll @@ -2,8 +2,17 @@ @x = common global <8 x float> zeroinitializer, align 32 @y = common global <4 x double> zeroinitializer, align 32 +@z = common global <4 x float> zeroinitializer, align 16 -define void @zero() nounwind ssp { +define void @zero128() nounwind ssp { +entry: + ; CHECK: vxorps + ; CHECK: vmovaps + store <4 x float> zeroinitializer, <4 x float>* @z, align 16 + ret void +} + +define void @zero256() nounwind ssp { entry: ; CHECK: vxorps ; CHECK: vmovaps diff --git a/test/CodeGen/X86/avx-cmp-fp.ll b/test/CodeGen/X86/avx-cmp.ll index b10d9ae..c90e225 100644 --- a/test/CodeGen/X86/avx-cmp-fp.ll +++ b/test/CodeGen/X86/avx-cmp.ll @@ -1,5 +1,21 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s +; CHECK: vcmpltps %ymm +; CHECK-NOT: vucomiss +define <8 x i32> @cmp00(<8 x float> %a, <8 x float> %b) nounwind readnone { + %bincmp = fcmp olt <8 x float> %a, %b + %s = sext <8 x i1> %bincmp to <8 x i32> + ret <8 x i32> %s +} + +; CHECK: vcmpltpd %ymm +; CHECK-NOT: vucomisd +define <4 x i64> @cmp01(<4 x double> %a, <4 x double> %b) nounwind readnone { + %bincmp = fcmp olt <4 x double> %a, %b + %s = sext <4 x i1> %bincmp to <4 x i64> + ret <4 x i64> %s +} + declare void @scale() nounwind uwtable ; CHECK: vucomisd diff --git a/test/CodeGen/X86/avx-128.ll b/test/CodeGen/X86/avx-cvt.ll index fe1472f..6da47af 100644 --- a/test/CodeGen/X86/avx-128.ll +++ b/test/CodeGen/X86/avx-cvt.ll @@ -1,24 +1,23 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s -@z = common global <4 x float> zeroinitializer, align 16 +; CHECK: vcvtdq2ps %ymm +define <8 x float> @sitofp00(<8 x i32> %a) nounwind { + %b = sitofp <8 x i32> %a to <8 x float> + ret <8 x float> %b +} -define void @zero() nounwind ssp { -entry: - ; CHECK: vxorps - ; CHECK: vmovaps - store <4 x float> zeroinitializer, <4 x float>* @z, align 16 - ret void +; CHECK: vcvttps2dq %ymm +define <8 x i32> @fptosi00(<8 x float> %a) nounwind { + %b = fptosi <8 x float> %a to <8 x i32> + ret <8 x i32> %b } -define void @fpext() nounwind uwtable { -entry: - %f = alloca float, align 4 - %d = alloca double, align 8 - %tmp = load float* %f, align 4 - ; CHECK: vcvtss2sd - %conv = fpext float %tmp to double - store double %conv, double* %d, align 8 - ret void +; CHECK: vcvtpd2psy %ymm +; CHECK-NEXT: vcvtpd2psy %ymm +; CHECK-NEXT: vinsertf128 $1 +define <8 x float> @fptrunc00(<8 x double> %b) nounwind { + %a = fptrunc <8 x double> %b to <8 x float> + ret <8 x float> %a } ; CHECK: vcvtsi2sdq (% @@ -53,20 +52,14 @@ entry: ret float %conv } -; CHECK: vsqrtss -define float @sqrtA(float %a) nounwind uwtable readnone ssp { -entry: - %conv1 = tail call float @sqrtf(float %a) nounwind readnone - ret float %conv1 -} - -declare double @sqrt(double) readnone - -; CHECK: vsqrtsd -define double @sqrtB(double %a) nounwind uwtable readnone ssp { +; CHECK: vcvtss2sd +define void @fpext() nounwind uwtable { entry: - %call = tail call double @sqrt(double %a) nounwind readnone - ret double %call + %f = alloca float, align 4 + %d = alloca double, align 8 + %tmp = load float* %f, align 4 + %conv = fpext float %tmp to double + store double %conv, double* %d, align 8 + ret void } -declare float @sqrtf(float) readnone diff --git a/test/CodeGen/X86/avx-256-logic.ll b/test/CodeGen/X86/avx-logic.ll index d9e5d08..d9e5d08 100644 --- a/test/CodeGen/X86/avx-256-logic.ll +++ b/test/CodeGen/X86/avx-logic.ll diff --git a/test/CodeGen/X86/avx-256-movdup.ll b/test/CodeGen/X86/avx-movdup.ll index 42d84de..42d84de 100644 --- a/test/CodeGen/X86/avx-256-movdup.ll +++ b/test/CodeGen/X86/avx-movdup.ll diff --git a/test/CodeGen/X86/avx-256-splat.ll b/test/CodeGen/X86/avx-splat.ll index 36d4694..36d4694 100644 --- a/test/CodeGen/X86/avx-256-splat.ll +++ b/test/CodeGen/X86/avx-splat.ll diff --git a/test/CodeGen/X86/avx-256-unpack.ll b/test/CodeGen/X86/avx-unpack.ll index 4e906ee..4e906ee 100644 --- a/test/CodeGen/X86/avx-256-unpack.ll +++ b/test/CodeGen/X86/avx-unpack.ll |