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authorEvan Cheng <evan.cheng@apple.com>2010-08-11 06:51:54 +0000
committerEvan Cheng <evan.cheng@apple.com>2010-08-11 06:51:54 +0000
commitd6b463225674c10511b00f8f631a89b6da5afc54 (patch)
tree02ca1da757e1529bb737907116850d5c2f68d7be /test/CodeGen
parent345a9a6269318c96f333c0492b23733e29d952df (diff)
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Add ARM Archv6M and let it implies FeatureDB (having dmb, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110795 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/Thumb/barrier.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/Thumb/barrier.ll b/test/CodeGen/Thumb/barrier.ll
index 0081837..12a84fc 100644
--- a/test/CodeGen/Thumb/barrier.ll
+++ b/test/CodeGen/Thumb/barrier.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=thumb -mattr=+v6 | FileCheck %s -check-prefix=V6
-; RUN: llc < %s -march=thumb -mcpu=cortex-m0 | FileCheck %s -check-prefix=M0
+; RUN: llc < %s -march=thumb -mattr=+v6 | FileCheck %s -check-prefix=V6
+; RUN: llc < %s -march=thumb -mattr=+v6m | FileCheck %s -check-prefix=V6M
declare void @llvm.memory.barrier( i1 , i1 , i1 , i1 , i1 )
@@ -7,8 +7,8 @@ define void @t1() {
; V6: t1:
; V6: blx {{_*}}sync_synchronize
-; M0: t1:
-; M0: dsb
+; V6M: t1:
+; V6M: dsb
call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 true )
ret void
}
@@ -17,8 +17,8 @@ define void @t2() {
; V6: t2:
; V6: blx {{_*}}sync_synchronize
-; M0: t2:
-; M0: dmb
+; V6M: t2:
+; V6M: dmb
call void @llvm.memory.barrier( i1 false, i1 false, i1 false, i1 true, i1 false )
ret void
}