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author | Bob Wilson <bob.wilson@apple.com> | 2010-08-16 22:26:55 +0000 |
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committer | Bob Wilson <bob.wilson@apple.com> | 2010-08-16 22:26:55 +0000 |
commit | dc66edaced5dacb56f06f52723dd340d5cfe4eab (patch) | |
tree | 2a1889b60846d442cc2e3b1c81e27238a7623a14 /test/CodeGen | |
parent | b05b80160a212626c34155daca9d858e1d0c445a (diff) | |
download | external_llvm-dc66edaced5dacb56f06f52723dd340d5cfe4eab.zip external_llvm-dc66edaced5dacb56f06f52723dd340d5cfe4eab.tar.gz external_llvm-dc66edaced5dacb56f06f52723dd340d5cfe4eab.tar.bz2 |
Generalize a pattern for PKHTB: an SRL of 16-31 bits will guarantee
that the high halfword is zero. The shift need not be exactly 16 bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111196 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/ARM/pack.ll | 11 | ||||
-rw-r--r-- | test/CodeGen/Thumb2/thumb2-pack.ll | 9 |
2 files changed, 19 insertions, 1 deletions
diff --git a/test/CodeGen/ARM/pack.ll b/test/CodeGen/ARM/pack.ll index 887f140..25a3ccd 100644 --- a/test/CodeGen/ARM/pack.ll +++ b/test/CodeGen/ARM/pack.ll @@ -38,7 +38,7 @@ define i32 @test3(i32 %X, i32 %Y) { } ; CHECK: test4 -; CHECK: pkhbt r0, r0, r1 +; CHECK: pkhbt r0, r0, r1, lsl #0 define i32 @test4(i32 %X, i32 %Y) { %tmp1 = and i32 %X, 65535 ; <i32> [#uses=1] %tmp3 = and i32 %Y, -65536 ; <i32> [#uses=1] @@ -86,3 +86,12 @@ define i32 @test7(i32 %X, i32 %Y) { %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1] ret i32 %tmp57 } + +; CHECK: test8 +; CHECK: pkhtb r0, r0, r1, asr #22 +define i32 @test8(i32 %X, i32 %Y) { + %tmp1 = and i32 %X, -65536 + %tmp3 = lshr i32 %Y, 22 + %tmp57 = or i32 %tmp3, %tmp1 + ret i32 %tmp57 +} diff --git a/test/CodeGen/Thumb2/thumb2-pack.ll b/test/CodeGen/Thumb2/thumb2-pack.ll index b3be923..d3e29c8 100644 --- a/test/CodeGen/Thumb2/thumb2-pack.ll +++ b/test/CodeGen/Thumb2/thumb2-pack.ll @@ -86,3 +86,12 @@ define i32 @test7(i32 %X, i32 %Y) { %tmp57 = or i32 %tmp4, %tmp1 ; <i32> [#uses=1] ret i32 %tmp57 } + +; CHECK: test8 +; CHECK: pkhtb r0, r0, r1, asr #22 +define i32 @test8(i32 %X, i32 %Y) { + %tmp1 = and i32 %X, -65536 + %tmp3 = lshr i32 %Y, 22 + %tmp57 = or i32 %tmp3, %tmp1 + ret i32 %tmp57 +} |