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| author | Hal Finkel <hfinkel@anl.gov> | 2013-03-19 15:23:39 +0000 |
|---|---|---|
| committer | Hal Finkel <hfinkel@anl.gov> | 2013-03-19 15:23:39 +0000 |
| commit | ec2e968b7a60a4b48bbb315f8dd6e96e51c31691 (patch) | |
| tree | afe42f70988809f40086e9beecba125a794d505e /test/CodeGen | |
| parent | 037a4bcde341e7f8546d69a842acbd5129a61f31 (diff) | |
| download | external_llvm-ec2e968b7a60a4b48bbb315f8dd6e96e51c31691.zip external_llvm-ec2e968b7a60a4b48bbb315f8dd6e96e51c31691.tar.gz external_llvm-ec2e968b7a60a4b48bbb315f8dd6e96e51c31691.tar.bz2 | |
Cleanup PPC64 unaligned i64 load/store
Remove an accidentally-added instruction definition and add a comment in the
test case. This is in response to a post-commit review by Bill Schmidt.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177404 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/PowerPC/unal4-std.ll | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/test/CodeGen/PowerPC/unal4-std.ll b/test/CodeGen/PowerPC/unal4-std.ll index dc4c20c..169bd78 100644 --- a/test/CodeGen/PowerPC/unal4-std.ll +++ b/test/CodeGen/PowerPC/unal4-std.ll @@ -17,6 +17,9 @@ vector.body.i: ; preds = %vector.body.i, %if. if.end210: ; preds = %entry ret void +; This will generate two align-1 i64 stores. Make sure that they are +; indexed stores and not in r+i form (which require the offset to be +; a multiple of 4). ; CHECK: @copy_to_conceal ; CHECK: stdx {{[0-9]+}}, 0, } |