diff options
| author | Bill Wendling <isanbard@gmail.com> | 2013-11-22 05:18:23 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2013-11-22 05:18:23 +0000 |
| commit | f0061998dd1256df1ba933e80fdad2f594ea3f50 (patch) | |
| tree | 3c1c5bad0f7f050389f3a39b8d84970b5e6e33a5 /test/CodeGen | |
| parent | f62b274a93d4014d56fa3a656f4fac6e7d827358 (diff) | |
| download | external_llvm-f0061998dd1256df1ba933e80fdad2f594ea3f50.zip external_llvm-f0061998dd1256df1ba933e80fdad2f594ea3f50.tar.gz external_llvm-f0061998dd1256df1ba933e80fdad2f594ea3f50.tar.bz2 | |
Merging r195398:
------------------------------------------------------------------------
r195398 | tstellar | 2013-11-21 16:41:05 -0800 (Thu, 21 Nov 2013) | 7 lines
SelectionDAG: Optimize expansion of vec_type = BITCAST scalar_type
The legalizer can now do this type of expansion for more
type combinations without loading and storing to and
from the stack.
NOTE: This is a candidate for the 3.4 branch.
------------------------------------------------------------------------
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195414 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/R600/vselect64.ll | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/R600/vselect64.ll b/test/CodeGen/R600/vselect64.ll new file mode 100644 index 0000000..604695b --- /dev/null +++ b/test/CodeGen/R600/vselect64.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; XXX: Merge this test into vselect.ll once SI supports 64-bit select. + +; CHECK-LABEL: @test_select_v4i64 +; Make sure the vectors aren't being stored on the stack. We know they are +; being stored on the stack if the shaders uses at leat 10 registers. +; CHECK-NOT: {{\**}} MOV T{{[0-9][0-9]}}.X +define void @test_select_v4i64(<4 x i64> addrspace(1)* %out, <4 x i32> %c) { +entry: + %cmp = icmp ne <4 x i32> %c, <i32 0, i32 0, i32 0, i32 0> + %result = select <4 x i1> %cmp, <4 x i64> <i64 0, i64 1, i64 2, i64 3>, <4 x i64> <i64 4, i64 5, i64 6, i64 7> + store <4 x i64> %result, <4 x i64> addrspace(1)* %out + ret void +} + |