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authorBill Wendling <isanbard@gmail.com>2013-12-09 01:54:36 +0000
committerBill Wendling <isanbard@gmail.com>2013-12-09 01:54:36 +0000
commitf9a98aeb5b5129c9eeb95978c7cf925e4a88e224 (patch)
tree0351a603c02e8faa9225e5653195be6786236be8 /test/CodeGen
parente8098892f517c492193f8f8ebdcbb861d7a7b54a (diff)
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Merging r196735:
------------------------------------------------------------------------ r196735 | venkatra | 2013-12-08 14:06:07 -0800 (Sun, 08 Dec 2013) | 3 lines [SparcV9]: Expand MULHU/MULHS:i64 and UMUL_LOHI/SMUL_LOHI:i64 on sparcv9. This fixes PR18150. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196744 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/SPARC/rem.ll16
1 files changed, 16 insertions, 0 deletions
diff --git a/test/CodeGen/SPARC/rem.ll b/test/CodeGen/SPARC/rem.ll
index 71f62e4..abef1fc 100644
--- a/test/CodeGen/SPARC/rem.ll
+++ b/test/CodeGen/SPARC/rem.ll
@@ -21,3 +21,19 @@ define i64 @test2(i64 %X, i64 %Y) {
%tmp1 = urem i64 %X, %Y
ret i64 %tmp1
}
+
+; PR18150
+; CHECK-LABEL: test3
+; CHECK: sethi 2545, [[R0:%[gilo][0-7]]]
+; CHECK: or [[R0]], 379, [[R1:%[gilo][0-7]]]
+; CHECK: mulx %o0, [[R1]], [[R2:%[gilo][0-7]]]
+; CHECK: udivx [[R2]], 1021, [[R3:%[gilo][0-7]]]
+; CHECK: mulx [[R3]], 1021, [[R4:%[gilo][0-7]]]
+; CHECK: sub [[R2]], [[R4]], %o0
+
+define i64 @test3(i64 %b) {
+entry:
+ %mul = mul i64 %b, 2606459
+ %rem = urem i64 %mul, 1021
+ ret i64 %rem
+}