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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll | |
parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll')
-rw-r--r-- | test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll b/test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll index 26bd838..8ae496d 100644 --- a/test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll +++ b/test/ExecutionEngine/MCJIT/test-global-init-nonzero-sm-pic.ll @@ -12,24 +12,24 @@ entry: br label %for.cond for.cond: ; preds = %for.inc, %entry - %0 = load i32* %i, align 4 + %0 = load i32, i32* %i, align 4 %cmp = icmp slt i32 %0, 49 br i1 %cmp, label %for.body, label %for.end for.body: ; preds = %for.cond - %1 = load i32* @count, align 4 + %1 = load i32, i32* @count, align 4 %inc = add nsw i32 %1, 1 store i32 %inc, i32* @count, align 4 br label %for.inc for.inc: ; preds = %for.body - %2 = load i32* %i, align 4 + %2 = load i32, i32* %i, align 4 %inc1 = add nsw i32 %2, 1 store i32 %inc1, i32* %i, align 4 br label %for.cond for.end: ; preds = %for.cond - %3 = load i32* @count, align 4 + %3 = load i32, i32* @count, align 4 %sub = sub nsw i32 %3, 50 ret i32 %sub } |