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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 21:22:52 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-10 21:23:04 +0000 |
commit | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/ExecutionEngine/OrcMCJIT/test-arith.ll | |
parent | c75239e6119d0f9a74c57099d91cbc9bde56bf33 (diff) | |
parent | 4c5e43da7792f75567b693105cc53e3f1992ad98 (diff) | |
download | external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.zip external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.gz external_llvm-31195f0bdca6ee2a5e72d07edf13e1d81206d949.tar.bz2 |
Merge "Update aosp/master llvm for rebase to r233350"
Diffstat (limited to 'test/ExecutionEngine/OrcMCJIT/test-arith.ll')
-rw-r--r-- | test/ExecutionEngine/OrcMCJIT/test-arith.ll | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/test/ExecutionEngine/OrcMCJIT/test-arith.ll b/test/ExecutionEngine/OrcMCJIT/test-arith.ll new file mode 100644 index 0000000..c4331bf --- /dev/null +++ b/test/ExecutionEngine/OrcMCJIT/test-arith.ll @@ -0,0 +1,34 @@ +; RUN: %lli -jit-kind=orc-mcjit %s > /dev/null + +define i32 @main() { + %A = add i8 0, 12 ; <i8> [#uses=1] + %B = sub i8 %A, 1 ; <i8> [#uses=2] + %C = mul i8 %B, %B ; <i8> [#uses=2] + %D = sdiv i8 %C, %C ; <i8> [#uses=2] + %E = srem i8 %D, %D ; <i8> [#uses=0] + %F = udiv i8 5, 6 ; <i8> [#uses=0] + %G = urem i8 6, 5 ; <i8> [#uses=0] + %A.upgrd.1 = add i16 0, 12 ; <i16> [#uses=1] + %B.upgrd.2 = sub i16 %A.upgrd.1, 1 ; <i16> [#uses=2] + %C.upgrd.3 = mul i16 %B.upgrd.2, %B.upgrd.2 ; <i16> [#uses=2] + %D.upgrd.4 = sdiv i16 %C.upgrd.3, %C.upgrd.3 ; <i16> [#uses=2] + %E.upgrd.5 = srem i16 %D.upgrd.4, %D.upgrd.4 ; <i16> [#uses=0] + %F.upgrd.6 = udiv i16 5, 6 ; <i16> [#uses=0] + %G.upgrd.7 = urem i32 6, 5 ; <i32> [#uses=0] + %A.upgrd.8 = add i32 0, 12 ; <i32> [#uses=1] + %B.upgrd.9 = sub i32 %A.upgrd.8, 1 ; <i32> [#uses=2] + %C.upgrd.10 = mul i32 %B.upgrd.9, %B.upgrd.9 ; <i32> [#uses=2] + %D.upgrd.11 = sdiv i32 %C.upgrd.10, %C.upgrd.10 ; <i32> [#uses=2] + %E.upgrd.12 = srem i32 %D.upgrd.11, %D.upgrd.11 ; <i32> [#uses=0] + %F.upgrd.13 = udiv i32 5, 6 ; <i32> [#uses=0] + %G1 = urem i32 6, 5 ; <i32> [#uses=0] + %A.upgrd.14 = add i64 0, 12 ; <i64> [#uses=1] + %B.upgrd.15 = sub i64 %A.upgrd.14, 1 ; <i64> [#uses=2] + %C.upgrd.16 = mul i64 %B.upgrd.15, %B.upgrd.15 ; <i64> [#uses=2] + %D.upgrd.17 = sdiv i64 %C.upgrd.16, %C.upgrd.16 ; <i64> [#uses=2] + %E.upgrd.18 = srem i64 %D.upgrd.17, %D.upgrd.17 ; <i64> [#uses=0] + %F.upgrd.19 = udiv i64 5, 6 ; <i64> [#uses=0] + %G.upgrd.20 = urem i64 6, 5 ; <i64> [#uses=0] + ret i32 0 +} + |