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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
| commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
| tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll | |
| parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
| parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
| download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 | |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll')
| -rw-r--r-- | test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll b/test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll new file mode 100644 index 0000000..9b1e241 --- /dev/null +++ b/test/Instrumentation/AddressSanitizer/do-not-instrument-promotable-allocas.ll @@ -0,0 +1,21 @@ +; RUN: opt < %s -asan -asan-module -asan-instrument-allocas=1 -S | FileCheck %s --check-prefix=CHECK + +target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.10.0" + +define i32 @test_promotable_allocas() sanitize_address { +entry: +; CHECK: %0 = alloca i32, align 4 +; CHECK: store i32 0, i32* %0, align 4 +; CHECK: %1 = load i32, i32* %0, align 4 +; CHECK: ret i32 %1 + +; CHECK-NOT: __asan_stack_malloc_0 +; CHECK-NOT: icmp +; CHECK-NOT: call void @__asan_report_store4 + + %0 = alloca i32, align 4 + store i32 0, i32* %0, align 4 + %1 = load i32, i32* %0, align 4 + ret i32 %1 +} |