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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 22:08:18 +0000
committerAndroid Git Automerger <android-git-automerger@android.com>2015-04-10 22:08:18 +0000
commit13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Instrumentation/MemorySanitizer/atomics.ll
parent0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff)
parent31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff)
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am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949': Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Instrumentation/MemorySanitizer/atomics.ll')
-rw-r--r--test/Instrumentation/MemorySanitizer/atomics.ll24
1 files changed, 12 insertions, 12 deletions
diff --git a/test/Instrumentation/MemorySanitizer/atomics.ll b/test/Instrumentation/MemorySanitizer/atomics.ll
index 28736ad..e896eae 100644
--- a/test/Instrumentation/MemorySanitizer/atomics.ll
+++ b/test/Instrumentation/MemorySanitizer/atomics.ll
@@ -77,13 +77,13 @@ entry:
define i32 @AtomicLoad(i32* %p) sanitize_memory {
entry:
- %0 = load atomic i32* %p seq_cst, align 16
+ %0 = load atomic i32, i32* %p seq_cst, align 16
ret i32 %0
}
; CHECK: @AtomicLoad
-; CHECK: load atomic i32* {{.*}} seq_cst, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} seq_cst, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
; CHECK: ret i32
@@ -92,13 +92,13 @@ entry:
define i32 @AtomicLoadAcquire(i32* %p) sanitize_memory {
entry:
- %0 = load atomic i32* %p acquire, align 16
+ %0 = load atomic i32, i32* %p acquire, align 16
ret i32 %0
}
; CHECK: @AtomicLoadAcquire
-; CHECK: load atomic i32* {{.*}} acquire, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} acquire, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
; CHECK: ret i32
@@ -107,13 +107,13 @@ entry:
define i32 @AtomicLoadMonotonic(i32* %p) sanitize_memory {
entry:
- %0 = load atomic i32* %p monotonic, align 16
+ %0 = load atomic i32, i32* %p monotonic, align 16
ret i32 %0
}
; CHECK: @AtomicLoadMonotonic
-; CHECK: load atomic i32* {{.*}} acquire, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} acquire, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
; CHECK: ret i32
@@ -122,13 +122,13 @@ entry:
define i32 @AtomicLoadUnordered(i32* %p) sanitize_memory {
entry:
- %0 = load atomic i32* %p unordered, align 16
+ %0 = load atomic i32, i32* %p unordered, align 16
ret i32 %0
}
; CHECK: @AtomicLoadUnordered
-; CHECK: load atomic i32* {{.*}} acquire, align 16
-; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32* {{.*}}, align 16
+; CHECK: load atomic i32, i32* {{.*}} acquire, align 16
+; CHECK: [[SHADOW:%[01-9a-z_]+]] = load i32, i32* {{.*}}, align 16
; CHECK: store i32 {{.*}}[[SHADOW]], {{.*}} @__msan_retval_tls
; CHECK: ret i32