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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Linker/partial-type-refinement.ll | |
parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Linker/partial-type-refinement.ll')
-rw-r--r-- | test/Linker/partial-type-refinement.ll | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/test/Linker/partial-type-refinement.ll b/test/Linker/partial-type-refinement.ll index b995f11..e9a645b 100644 --- a/test/Linker/partial-type-refinement.ll +++ b/test/Linker/partial-type-refinement.ll @@ -1,7 +1,7 @@ ; RUN: llvm-link %s %p/partial-type-refinement-link.ll -S | FileCheck %s ; PR4954 -; CHECK: load %PI** getelementptr inbounds (%"RegisterP<LowerArrayLength>"* @_ZN3mvmL1XE, i64 0, i32 0, i32 6, i32 0, i32 0, i32 0), align 16 +; CHECK: load %PI*, %PI** getelementptr inbounds (%"RegisterP<LowerArrayLength>", %"RegisterP<LowerArrayLength>"* @_ZN3mvmL1XE, i64 0, i32 0, i32 6, i32 0, i32 0, i32 0), align 16 %AnalysisResolver = type { i8, %PMDataManager* } %"DenseMap<P*,AU*>" = type { i64, %"pair<P*,AU*>"*, i64, i64 } @@ -19,6 +19,6 @@ define void @__tcf_0() nounwind { entry: - %0 = load %PI** getelementptr inbounds (%"RegisterP<LowerArrayLength>"* @_ZN3mvmL1XE, i64 0, i32 0, i32 6, i32 0, i32 0, i32 0), align 16 + %0 = load %PI*, %PI** getelementptr inbounds (%"RegisterP<LowerArrayLength>", %"RegisterP<LowerArrayLength>"* @_ZN3mvmL1XE, i64 0, i32 0, i32 6, i32 0, i32 0, i32 0), align 16 ret void } |