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| author | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-06 11:46:36 -0700 |
|---|---|---|
| committer | Pirama Arumuga Nainar <pirama@google.com> | 2015-05-18 10:52:30 -0700 |
| commit | 2c3e0051c31c3f5b2328b447eadf1cf9c4427442 (patch) | |
| tree | c0104029af14e9f47c2ef58ca60e6137691f3c9b /test/MC/AArch64/armv8.1a-lor.s | |
| parent | e1bc145815f4334641be19f1c45ecf85d25b6e5a (diff) | |
| download | external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.zip external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.gz external_llvm-2c3e0051c31c3f5b2328b447eadf1cf9c4427442.tar.bz2 | |
Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7
(cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
Diffstat (limited to 'test/MC/AArch64/armv8.1a-lor.s')
| -rw-r--r-- | test/MC/AArch64/armv8.1a-lor.s | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/test/MC/AArch64/armv8.1a-lor.s b/test/MC/AArch64/armv8.1a-lor.s new file mode 100644 index 0000000..309cb32 --- /dev/null +++ b/test/MC/AArch64/armv8.1a-lor.s @@ -0,0 +1,33 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.1a < %s | FileCheck %s + + +//------------------------------------------------------------------------------ +// Load acquire / store release +//------------------------------------------------------------------------------ + ldlarb w0,[x1] + ldlarh w0,[x1] + ldlar w0,[x1] + ldlar x0,[x1] +// CHECK: ldlarb w0, [x1] // encoding: [0x20,0x7c,0xdf,0x08] +// CHECK: ldlarh w0, [x1] // encoding: [0x20,0x7c,0xdf,0x48] +// CHECK: ldlar w0, [x1] // encoding: [0x20,0x7c,0xdf,0x88] +// CHECK: ldlar x0, [x1] // encoding: [0x20,0x7c,0xdf,0xc8] + stllrb w0,[x1] + stllrh w0,[x1] + stllr w0,[x1] + stllr x0,[x1] +// CHECK: stllrb w0, [x1] // encoding: [0x20,0x7c,0x9f,0x08] +// CHECK: stllrh w0, [x1] // encoding: [0x20,0x7c,0x9f,0x48] +// CHECK: stllr w0, [x1] // encoding: [0x20,0x7c,0x9f,0x88] +// CHECK: stllr x0, [x1] // encoding: [0x20,0x7c,0x9f,0xc8] + + msr LORSA_EL1, x0 + msr LOREA_EL1, x0 + msr LORN_EL1, x0 + msr LORC_EL1, x0 + mrs x0, LORID_EL1 +// CHECK: msr LORSA_EL1, x0 // encoding: [0x00,0xa4,0x18,0xd5] +// CHECK: msr LOREA_EL1, x0 // encoding: [0x20,0xa4,0x18,0xd5] +// CHECK: msr LORN_EL1, x0 // encoding: [0x40,0xa4,0x18,0xd5] +// CHECK: msr LORC_EL1, x0 // encoding: [0x60,0xa4,0x18,0xd5] +// CHECK: mrs x0, LORID_EL1 // encoding: [0xe0,0xa4,0x38,0xd5] |