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| author | Tim Northover <Tim.Northover@arm.com> | 2013-04-10 12:08:35 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-04-10 12:08:35 +0000 |
| commit | 8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4 (patch) | |
| tree | b9506d93306a8ea590e51a69a8e489744f251a58 /test/MC/ARM/arm-trustzone.s | |
| parent | 2318508117fbc567bfef5b67a63c91ff7fad2697 (diff) | |
| download | external_llvm-8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4.zip external_llvm-8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4.tar.gz external_llvm-8c9e52a9fc1f99cf80c499ef10e6c8a54ef899d4.tar.bz2 | |
ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
These instructions aren't universally available, but depend on a specific
extension to the normal ARM architecture (rather than, say, v6/v7/...) so a new
feature is appropriate.
This also enables the feature by default on A-class cores which usually have
these extensions, to avoid breaking existing code and act as a sensible
default.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179171 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/arm-trustzone.s')
| -rw-r--r-- | test/MC/ARM/arm-trustzone.s | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/test/MC/ARM/arm-trustzone.s b/test/MC/ARM/arm-trustzone.s new file mode 100644 index 0000000..69157f6 --- /dev/null +++ b/test/MC/ARM/arm-trustzone.s @@ -0,0 +1,24 @@ +@ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ +@ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ + + .syntax unified + .globl _func + +@ Check that the assembler processes SMC instructions when TrustZone support is +@ active and that it rejects them when this feature is not enabled + +_func: +@ CHECK: _func + + +@------------------------------------------------------------------------------ +@ SMC +@------------------------------------------------------------------------------ + smc #0xf + smceq #0 + +@ NOTZ-NOT: smc #15 +@ NOTZ-NOT: smceq #0 +@ TZ: smc #15 @ encoding: [0x7f,0x00,0x60,0xe1] +@ TZ: smceq #0 @ encoding: [0x70,0x00,0x60,0x01] + |