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authorPirama Arumuga Nainar <pirama@google.com>2015-05-06 11:46:36 -0700
committerPirama Arumuga Nainar <pirama@google.com>2015-05-18 10:52:30 -0700
commit2c3e0051c31c3f5b2328b447eadf1cf9c4427442 (patch)
treec0104029af14e9f47c2ef58ca60e6137691f3c9b /test/MC/ARM/eh-directive-personalityindex.s
parente1bc145815f4334641be19f1c45ecf85d25b6e5a (diff)
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Update aosp/master LLVM for rebase to r235153
Change-Id: I9bf53792f9fc30570e81a8d80d296c681d005ea7 (cherry picked from commit 0c7f116bb6950ef819323d855415b2f2b0aad987)
Diffstat (limited to 'test/MC/ARM/eh-directive-personalityindex.s')
-rw-r--r--test/MC/ARM/eh-directive-personalityindex.s97
1 files changed, 49 insertions, 48 deletions
diff --git a/test/MC/ARM/eh-directive-personalityindex.s b/test/MC/ARM/eh-directive-personalityindex.s
index 5517227..6db9425 100644
--- a/test/MC/ARM/eh-directive-personalityindex.s
+++ b/test/MC/ARM/eh-directive-personalityindex.s
@@ -1,5 +1,7 @@
@ RUN: llvm-mc -triple armv7-linux-eabi -filetype obj -o - %s \
-@ RUN: | llvm-readobj -s -sd -sr | FileCheck %s
+@ RUN: | llvm-readobj -s -sd -sr > %t
+@ RUN: FileCheck %s < %t
+@ RUN: FileCheck --check-prefix=RELOC %s < %t
.syntax unified
.thumb
@@ -23,13 +25,13 @@ pr0:
@ CHECK: )
@ CHECK: }
-@ CHECK: Section {
-@ CHECK: Name: .rel.ARM.exidx.pr0
-@ CHECK: Relocations [
-@ CHECK: 0x0 R_ARM_PREL31 .pr0 0x0
-@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
-@ CHECK: ]
-@ CHECK: }
+@ RELOC: Section {
+@ RELOC: Name: .rel.ARM.exidx.pr0
+@ RELOC: Relocations [
+@ RELOC: 0x0 R_ARM_PREL31 .pr0 0x0
+@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
+@ RELOC: ]
+@ RELOC: }
.section .pr0.nontrivial
@@ -52,13 +54,13 @@ pr0_nontrivial:
@ CHECK: )
@ CHECK: }
-@ CHECK: Section {
-@ CHECK: Name: .rel.ARM.exidx.pr0.nontrivial
-@ CHECK: Relocations [
-@ CHECK: 0x0 R_ARM_PREL31 .pr0.nontrivial 0x0
-@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
-@ CHECK: ]
-@ CHECK: }
+@ RELOC: Section {
+@ RELOC: Name: .rel.ARM.exidx.pr0.nontrivial
+@ RELOC: Relocations [
+@ RELOC: 0x0 R_ARM_PREL31 .pr0.nontrivial 0x0
+@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr0 0x0
+@ RELOC: ]
+@ RELOC: }
.section .pr1
@@ -85,14 +87,14 @@ pr1:
@ CHECK: )
@ CHECK: }
-@ CHECK: Section {
-@ CHECK: Name: .rel.ARM.exidx.pr1
-@ CHECK: Relocations [
-@ CHECK: 0x0 R_ARM_PREL31 .pr1 0x0
-@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
-@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr1 0x0
-@ CHECK: ]
-@ CHECK: }
+@ RELOC: Section {
+@ RELOC: Name: .rel.ARM.exidx.pr1
+@ RELOC: Relocations [
+@ RELOC: 0x0 R_ARM_PREL31 .pr1 0x0
+@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
+@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr1 0x0
+@ RELOC: ]
+@ RELOC: }
.section .pr1.nontrivial
@@ -122,14 +124,14 @@ pr1_nontrivial:
@ CHECK: )
@ CHECK: }
-@ CHECK: Section {
-@ CHECK: Name: .rel.ARM.exidx.pr1.nontrivial
-@ CHECK: Relocations [
-@ CHECK: 0x0 R_ARM_PREL31 .pr1.nontrivial 0x0
-@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
-@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr1.nontrivial 0x0
-@ CHECK: ]
-@ CHECK: }
+@ RELOC: Section {
+@ RELOC: Name: .rel.ARM.exidx.pr1.nontrivial
+@ RELOC: Relocations [
+@ RELOC: 0x0 R_ARM_PREL31 .pr1.nontrivial 0x0
+@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr1 0x0
+@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr1.nontrivial 0x0
+@ RELOC: ]
+@ RELOC: }
.section .pr2
@@ -156,14 +158,14 @@ pr2:
@ CHECK: )
@ CHECK: }
-@ CHECK: Section {
-@ CHECK: Name: .rel.ARM.exidx.pr2
-@ CHECK: Relocations [
-@ CHECK: 0x0 R_ARM_PREL31 .pr2 0x0
-@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0
-@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr2 0x0
-@ CHECK: ]
-@ CHECK: }
+@ RELOC: Section {
+@ RELOC: Name: .rel.ARM.exidx.pr2
+@ RELOC: Relocations [
+@ RELOC: 0x0 R_ARM_PREL31 .pr2 0x0
+@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0
+@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr2 0x0
+@ RELOC: ]
+@ RELOC: }
.section .pr2.nontrivial
.type pr2_nontrivial,%function
@@ -191,12 +193,11 @@ pr2_nontrivial:
@ CHECK: )
@ CHECK: }
-@ CHECK: Section {
-@ CHECK: Name: .rel.ARM.exidx.pr2.nontrivial
-@ CHECK: Relocations [
-@ CHECK: 0x0 R_ARM_PREL31 .pr2.nontrivial 0x0
-@ CHECK: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0
-@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.pr2.nontrivial 0x0
-@ CHECK: ]
-@ CHECK: }
-
+@ RELOC: Section {
+@ RELOC: Name: .rel.ARM.exidx.pr2.nontrivial
+@ RELOC: Relocations [
+@ RELOC: 0x0 R_ARM_PREL31 .pr2.nontrivial 0x0
+@ RELOC: 0x0 R_ARM_NONE __aeabi_unwind_cpp_pr2 0x0
+@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.pr2.nontrivial 0x0
+@ RELOC: ]
+@ RELOC: }