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author | Jim Grosbach <grosbach@apple.com> | 2010-10-14 23:32:44 +0000 |
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committer | Jim Grosbach <grosbach@apple.com> | 2010-10-14 23:32:44 +0000 |
commit | 53e7dcbd47c6ca34c0cd00c35b09ee5a2be7afe1 (patch) | |
tree | 4043985ef42798d0e2882557c04c9e5940c54c73 /test/MC/ARM/simple-encoding.ll | |
parent | 8faff9c759f8d87cfb4f0cb604d1dbc9842ae07b (diff) | |
download | external_llvm-53e7dcbd47c6ca34c0cd00c35b09ee5a2be7afe1.zip external_llvm-53e7dcbd47c6ca34c0cd00c35b09ee5a2be7afe1.tar.gz external_llvm-53e7dcbd47c6ca34c0cd00c35b09ee5a2be7afe1.tar.bz2 |
Simplify test file a bit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116540 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/simple-encoding.ll')
-rw-r--r-- | test/MC/ARM/simple-encoding.ll | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll index 00522da..3d63581 100644 --- a/test/MC/ARM/simple-encoding.ll +++ b/test/MC/ARM/simple-encoding.ll @@ -5,7 +5,7 @@ ; should run on .s source files rather than using llc to generate the ; assembly. -define i32 @foo(i32 %a, i32 %b) nounwind ssp { +define i32 @foo(i32 %a, i32 %b) { entry: ; CHECK: foo ; CHECK: trap @ encoding: [0xf0,0x00,0xf0,0x07] @@ -15,7 +15,7 @@ entry: ret i32 undef } -define i32 @f2(i32 %a, i32 %b) nounwind readnone ssp { +define i32 @f2(i32 %a, i32 %b) { entry: ; CHECK: f2 ; CHECK: add r0, r1, r0 @ encoding: [0x00,0x00,0x81,0xe0] @@ -25,7 +25,7 @@ entry: } -define i32 @f3(i32 %a, i32 %b) nounwind readnone ssp { +define i32 @f3(i32 %a, i32 %b) { entry: ; CHECK: f3 ; CHECK: add r0, r0, r1, lsl #3 @ encoding: [0x81,0x01,0x80,0xe0] @@ -35,7 +35,7 @@ entry: ret i32 %add } -define i32 @f4(i32 %a, i32 %b) nounwind readnone ssp { +define i32 @f4(i32 %a, i32 %b) { entry: ; CHECK: f4 ; CHECK: add r0, r0, #254, 28 @ encoding: [0xfe,0x0e,0x80,0xe2] @@ -45,7 +45,7 @@ entry: ret i32 %add } -define i32 @f5(i32 %a, i32 %b, i32 %c) nounwind readnone ssp { +define i32 @f5(i32 %a, i32 %b, i32 %c) { entry: ; CHECK: f5 ; CHECK: cmp r0, r1 @ encoding: [0x01,0x00,0x50,0xe1] @@ -56,7 +56,7 @@ entry: ret i32 %retval.0 } -define i64 @f6(i64 %a, i64 %b, i64 %c) nounwind readnone optsize ssp { +define i64 @f6(i64 %a, i64 %b, i64 %c) { entry: ; CHECK: f6 ; CHECK: adds r0, r2, r0 @ encoding: [0x00,0x00,0x92,0xe0] @@ -65,7 +65,7 @@ entry: ret i64 %add } -define i32 @f7(i32 %a, i32 %b) nounwind readnone optsize ssp { +define i32 @f7(i32 %a, i32 %b) { entry: ; CHECK: f7 ; CHECK: uxtab r0, r0, r1 @ encoding: [0x71,0x00,0xe0,0xe6] @@ -74,7 +74,7 @@ entry: ret i32 %add } -define i32 @f8(i32 %a) nounwind readnone ssp { +define i32 @f8(i32 %a) { entry: ; CHECK: f8 ; CHECK: movt r0, #42405 @ encoding: [0xa5,0x05,0x4a,0xe3] @@ -83,14 +83,14 @@ entry: ret i32 %or } -define i32 @f9() nounwind readnone ssp { +define i32 @f9() { entry: ; CHECK: f9 ; CHECK: movw r0, #42405 @ encoding: [0xa5,0x05,0x0a,0xe3] ret i32 42405 } -define i64 @f10(i64 %a) nounwind readnone ssp { +define i64 @f10(i64 %a) { entry: ; CHECK: f10 ; CHECK: asrs r1, r1, #1 @ encoding: [0xc1,0x10,0xb0,0xe1] |