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authorJim Grosbach <grosbach@apple.com>2011-08-24 21:22:15 +0000
committerJim Grosbach <grosbach@apple.com>2011-08-24 21:22:15 +0000
commit72f39f8436848885176943b0ba985a7171145423 (patch)
tree62db3c7e343891d72d69776a7e09dac252c55fd0 /test/MC/ARM/thumb-diagnostics.s
parent4317fe1fc669cf439cf253533323dd974f94ba4b (diff)
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Thumb parsing and encoding support for ADD SP instructions.
Fix the test FIXME and add parsing support for the ADD (SP plus immediate) and ADD (SP plus register) instruction forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138488 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/thumb-diagnostics.s')
-rw-r--r--test/MC/ARM/thumb-diagnostics.s19
1 files changed, 19 insertions, 0 deletions
diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s
index 650e8ce..ea5d115 100644
--- a/test/MC/ARM/thumb-diagnostics.s
+++ b/test/MC/ARM/thumb-diagnostics.s
@@ -118,3 +118,22 @@ error: invalid operand for instruction
@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
@ CHECK-ERRORS: svc #256
@ CHECK-ERRORS: ^
+
+
+@ Out of range immediate for ADD SP instructions
+ add sp, #-1
+ add sp, #3
+ add sp, sp, #512
+ add r2, sp, #1024
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: add sp, #-1
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: add sp, #3
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: add sp, sp, #512
+@ CHECK-ERRORS: ^
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: add r2, sp, #1024
+@ CHECK-ERRORS: ^