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| author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
| commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
| tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/MC/ARM/virtexts-thumb.s | |
| parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
| parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
| download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 | |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/MC/ARM/virtexts-thumb.s')
| -rw-r--r-- | test/MC/ARM/virtexts-thumb.s | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/test/MC/ARM/virtexts-thumb.s b/test/MC/ARM/virtexts-thumb.s new file mode 100644 index 0000000..d911e1d --- /dev/null +++ b/test/MC/ARM/virtexts-thumb.s @@ -0,0 +1,59 @@ +# RUN: llvm-mc -triple thumbv7 -mattr=virtualization -show-encoding %s | FileCheck %s --check-prefix=CHECK-THUMB + + hvc #1 + hvc #7 + hvc #257 + hvc #65535 +# CHECK-THUMB: [0xe0,0xf7,0x01,0x80] +# CHECK-THUMB: [0xe0,0xf7,0x07,0x80] +# CHECK-THUMB: [0xe0,0xf7,0x01,0x81] +# CHECK-THUMB: [0xef,0xf7,0xff,0x8f] + + hvc.w #1 + hvc.w #7 + hvc.w #257 + hvc.w #65535 +# CHECK-THUMB: [0xe0,0xf7,0x01,0x80] +# CHECK-THUMB: [0xe0,0xf7,0x07,0x80] +# CHECK-THUMB: [0xe0,0xf7,0x01,0x81] +# CHECK-THUMB: [0xef,0xf7,0xff,0x8f] + + eret + it eq; ereteq + it ne; eretne + it hs; ereths + it lo; eretlo + it mi; eretmi + it pl; eretpl + it vs; eretvs + it vc; eretvc + it hi; erethi + it ls; eretls + it ge; eretge + it lt; eretlt + it gt; eretgt + it le; eretle +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] + +# SUBS PC, LR, #0 should have the same encoding as ERET. +# The conditional forms can't be tested becuse the ARM assembler parser doesn't +# accept SUBS<cond> PC, LR, #<imm>, only the unconditonal form is allowed. This +# is due to the way that the custom parser handles optional operands; see the +# FIXME in ARM/AsmParser/ARMAsmParser.cpp. + + subs pc, lr, #0 +# CHECK-THUMB: [0xde,0xf3,0x00,0x8f] |