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author | Logan Chien <tzuhsiang.chien@gmail.com> | 2013-10-28 17:51:12 +0000 |
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committer | Logan Chien <tzuhsiang.chien@gmail.com> | 2013-10-28 17:51:12 +0000 |
commit | 23125d02d929758e1b0dbb30b13f1deff7a5ea4b (patch) | |
tree | 4c77dc2e41386fde9ae2f6529488c71689c50616 /test/MC/ARM | |
parent | 790b973f80c8fd41f0908536409538336242f74d (diff) | |
download | external_llvm-23125d02d929758e1b0dbb30b13f1deff7a5ea4b.zip external_llvm-23125d02d929758e1b0dbb30b13f1deff7a5ea4b.tar.gz external_llvm-23125d02d929758e1b0dbb30b13f1deff7a5ea4b.tar.bz2 |
[arm] Implement eabi_attribute, cpu, and fpu directives.
This commit allows the ARM integrated assembler to parse
and assemble the code with .eabi_attribute, .cpu, and
.fpu directives.
To implement the feature, this commit moves the code from
AttrEmitter to ARMTargetStreamers, and several new test
cases related to cortex-m4, cortex-r5, and cortex-a15 are
added.
Besides, this commit also change the Subtarget->isFPOnlySP()
to Subtarget->hasD16() to match the usage of .fpu directive.
This commit changes the test cases:
* Several .eabi_attribute directives in
2010-09-29-mc-asm-header-test.ll are removed because the .fpu
directive already cover the functionality.
* In the Cortex-A15 test case, the value for
Tag_Advanced_SIMD_arch has be changed from 1 to 2,
which is more precise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193524 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM')
-rw-r--r-- | test/MC/ARM/directive-cpu.s | 26 | ||||
-rw-r--r-- | test/MC/ARM/directive-eabi_attribute.s | 56 | ||||
-rw-r--r-- | test/MC/ARM/directive-fpu-multiple.s | 26 | ||||
-rw-r--r-- | test/MC/ARM/directive-fpu.s | 26 |
4 files changed, 134 insertions, 0 deletions
diff --git a/test/MC/ARM/directive-cpu.s b/test/MC/ARM/directive-cpu.s new file mode 100644 index 0000000..952dd93 --- /dev/null +++ b/test/MC/ARM/directive-cpu.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-readobj -s -sd | FileCheck %s + +@ CHECK: Name: .ARM.attribute +@ CHECK: SectionData ( + +@ <format-version> +@ CHECK: 41 + +@ <section-length> +@ CHECK: 1A0000 00 + +@ <vendor-name> "aeabi\0" +@ CHECK: 616561 626900 + +@ <file-tag> +@ CHECK: 01 + +@ <size> +@ CHECK: 10000000 + + .cpu cortex-a8 +@ CHECK: 05 +@ CHECK: 434F52 5445582D 413800 + +@ CHECK: ) diff --git a/test/MC/ARM/directive-eabi_attribute.s b/test/MC/ARM/directive-eabi_attribute.s new file mode 100644 index 0000000..c060b80 --- /dev/null +++ b/test/MC/ARM/directive-eabi_attribute.s @@ -0,0 +1,56 @@ +@ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-readobj -s -sd | FileCheck %s + +@ CHECK: Name: .ARM.attribute +@ CHECK: SectionData ( + +@ <format-version> +@ CHECK: 41 + +@ <section-length> +@ CHECK: 250000 00 + +@ <vendor-name> "aeabi\0" +@ CHECK: 616561 626900 + +@ <file-tag> +@ CHECK: 01 + +@ <size> +@ CHECK: 1B000000 + +@ <attribute>* + + .eabi_attribute 6, 10 +@ CHECK: 060A + + .eabi_attribute 7, 65 +@ CHECK: 0741 + + .eabi_attribute 8, 1 +@ CHECK: 0801 + + .eabi_attribute 9, 2 +@ CHECK: 0902 + + .eabi_attribute 10, 3 +@ CHECK: 0A03 + + .eabi_attribute 12, 1 +@ CHECK: 0C01 + + .eabi_attribute 20, 1 +@ CHECK: 1401 + + .eabi_attribute 21, 1 +@ CHECK: 1501 + + .eabi_attribute 23, 3 +@ CHECK: 1703 + + .eabi_attribute 24, 1 +@ CHECK: 1801 + + .eabi_attribute 25, 1 +@ CHECK: 1901 +@ CHECK: ) diff --git a/test/MC/ARM/directive-fpu-multiple.s b/test/MC/ARM/directive-fpu-multiple.s new file mode 100644 index 0000000..6a93f24 --- /dev/null +++ b/test/MC/ARM/directive-fpu-multiple.s @@ -0,0 +1,26 @@ +@ Check multiple .fpu directives. + +@ The later .fpu directive should overwrite the earlier one. +@ See also: directive-fpu-multiple2.s. + +@ RUN: llvm-mc < %s -triple arm-unknown-linux-gnueabi -filetype=obj \ +@ RUN: | llvm-readobj -s -sd | FileCheck %s + + .fpu neon + .fpu vfpv4 + +@ CHECK: Name: .ARM.attributes +@ CHECK-NEXT: Type: SHT_ARM_ATTRIBUTES (0x70000003) +@ CHECK-NEXT: Flags [ (0x0) +@ CHECK-NEXT: ] +@ CHECK-NEXT: Address: 0x0 +@ CHECK-NEXT: Offset: 0x34 +@ CHECK-NEXT: Size: 18 +@ CHECK-NEXT: Link: 0 +@ CHECK-NEXT: Info: 0 +@ CHECK-NEXT: AddressAlignment: 1 +@ CHECK-NEXT: EntrySize: 0 +@ CHECK-NEXT: SectionData ( +@ CHECK-NEXT: 0000: 41110000 00616561 62690001 07000000 +@ CHECK-NEXT: 0010: 0A05 +@ CHECK-NEXT: ) diff --git a/test/MC/ARM/directive-fpu.s b/test/MC/ARM/directive-fpu.s new file mode 100644 index 0000000..24e159c --- /dev/null +++ b/test/MC/ARM/directive-fpu.s @@ -0,0 +1,26 @@ +@ RUN: llvm-mc < %s -triple armv7-unknown-linux-gnueabi -filetype=obj -o - \ +@ RUN: | llvm-readobj -s -sd | FileCheck %s + +@ CHECK: Name: .ARM.attribute +@ CHECK: SectionData ( + +@ <format-version> +@ CHECK: 41 + +@ <section-length> +@ CHECK: 130000 00 + +@ <vendor-name> "aeabi\0" +@ CHECK: 616561 626900 + +@ <file-tag> +@ CHECK: 01 + +@ <size> +@ CHECK: 09000000 + + .fpu neon +@ CHECK: 0A03 +@ CHECK: 0C01 + +@ CHECK: ) |