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authorJim Grosbach <grosbach@apple.com>2011-07-14 21:26:42 +0000
committerJim Grosbach <grosbach@apple.com>2011-07-14 21:26:42 +0000
commitc8ae39e746a20dc326def0ccfc052df3e21f16d3 (patch)
tree4beedc52b6ada45c792c3323ae6a0b65513eb759 /test/MC/ARM
parentf54645346664e07a222281e51bad36b259a0d0af (diff)
downloadexternal_llvm-c8ae39e746a20dc326def0ccfc052df3e21f16d3.zip
external_llvm-c8ae39e746a20dc326def0ccfc052df3e21f16d3.tar.gz
external_llvm-c8ae39e746a20dc326def0ccfc052df3e21f16d3.tar.bz2
ARM MCRR/MCRR2 immediate operand range checking.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135192 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM')
-rw-r--r--test/MC/ARM/arm_instructions.s4
-rw-r--r--test/MC/ARM/basic-arm-instructions.s9
-rw-r--r--test/MC/ARM/diagnostics.s6
3 files changed, 14 insertions, 5 deletions
diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s
index 091ba72..c71ddde 100644
--- a/test/MC/ARM/arm_instructions.s
+++ b/test/MC/ARM/arm_instructions.s
@@ -91,15 +91,11 @@
@ CHECK: mrc p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xee]
mrc p14, #0, r1, c1, c2, #4
-@ CHECK: mcrr p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x44,0xec]
- mcrr p7, #1, r5, r4, c1
@ CHECK: mrrc p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xec]
mrrc p7, #1, r5, r4, c1
@ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe]
mrc2 p14, #0, r1, c1, c2, #4
-@ CHECK: mcrr2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x44,0xfc]
- mcrr2 p7, #1, r5, r4, c1
@ CHECK: mrrc2 p7, #1, r5, r4, c1 @ encoding: [0x11,0x57,0x54,0xfc]
mrrc2 p7, #1, r5, r4, c1
diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s
index 8d04ac3..8e579fb 100644
--- a/test/MC/ARM/basic-arm-instructions.s
+++ b/test/MC/ARM/basic-arm-instructions.s
@@ -639,6 +639,15 @@ _func:
@ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe]
@------------------------------------------------------------------------------
+@ MCRR/MCRR2
+@------------------------------------------------------------------------------
+ mcrr p7, #15, r5, r4, c1
+ mcrr2 p7, #15, r5, r4, c1
+
+@ CHECK: mcrr p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xec]
+@ CHECK: mcrr2 p7, #15, r5, r4, c1 @ encoding: [0xf1,0x57,0x44,0xfc]
+
+@------------------------------------------------------------------------------
@ STM*
@------------------------------------------------------------------------------
stm r2, {r1,r3-r6,sp}
diff --git a/test/MC/ARM/diagnostics.s b/test/MC/ARM/diagnostics.s
index f65df0f..7a9d85e 100644
--- a/test/MC/ARM/diagnostics.s
+++ b/test/MC/ARM/diagnostics.s
@@ -69,11 +69,15 @@
@ Double-check that we're synced up with the right diagnostics.
@ CHECK-ERRORS: dbg #16
- @ Out of range immediate for MCR/MCR2
+ @ Out of range immediate for MCR/MCR2/MCRR/MCRR2
mcr p7, #8, r5, c1, c1, #4
mcr p7, #2, r5, c1, c1, #8
mcr2 p7, #8, r5, c1, c1, #4
mcr2 p7, #1, r5, c1, c1, #8
+ mcrr p7, #16, r5, r4, c1
+ mcrr2 p7, #16, r5, r4, c1
+@ CHECK-ERRORS: error: invalid operand for instruction
+@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction
@ CHECK-ERRORS: error: invalid operand for instruction