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| author | Tim Northover <Tim.Northover@arm.com> | 2013-02-06 09:04:56 +0000 |
|---|---|---|
| committer | Tim Northover <Tim.Northover@arm.com> | 2013-02-06 09:04:56 +0000 |
| commit | 9e3b31345f0d17b757e183a8384db92616256926 (patch) | |
| tree | 33d5bbc47edbeb3d0563dc918a8d008c953af3bd /test/MC/Disassembler/AArch64/basic-a64-instructions.txt | |
| parent | 95ce4c2ffb0ff31a79b060fb112659322a5be3bf (diff) | |
| download | external_llvm-9e3b31345f0d17b757e183a8384db92616256926.zip external_llvm-9e3b31345f0d17b757e183a8384db92616256926.tar.gz external_llvm-9e3b31345f0d17b757e183a8384db92616256926.tar.bz2 | |
Add icache prefetch operations to AArch64
This adds hints to the various "prfm" instructions so that they can
affect the instruction cache as well as the data cache.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174495 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/AArch64/basic-a64-instructions.txt')
| -rw-r--r-- | test/MC/Disassembler/AArch64/basic-a64-instructions.txt | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/test/MC/Disassembler/AArch64/basic-a64-instructions.txt b/test/MC/Disassembler/AArch64/basic-a64-instructions.txt index 9c5a5eb..2de5f70 100644 --- a/test/MC/Disassembler/AArch64/basic-a64-instructions.txt +++ b/test/MC/Disassembler/AArch64/basic-a64-instructions.txt @@ -2335,6 +2335,44 @@ 0x43 0xfd 0x7f 0xfd 0xec 0xff 0xbf 0x3d +# CHECK: prfm pldl1keep, [sp, #8] +# CHECK: prfm pldl1strm, [x3, #0] +# CHECK: prfm pldl2keep, [x5, #16] +# CHECK: prfm pldl2strm, [x2, #0] +# CHECK: prfm pldl3keep, [x5, #0] +# CHECK: prfm pldl3strm, [x6, #0] +# CHECK: prfm plil1keep, [sp, #8] +# CHECK: prfm plil1strm, [x3, #0] +# CHECK: prfm plil2keep, [x5, #16] +# CHECK: prfm plil2strm, [x2, #0] +# CHECK: prfm plil3keep, [x5, #0] +# CHECK: prfm plil3strm, [x6, #0] +# CHECK: prfm pstl1keep, [sp, #8] +# CHECK: prfm pstl1strm, [x3, #0] +# CHECK: prfm pstl2keep, [x5, #16] +# CHECK: prfm pstl2strm, [x2, #0] +# CHECK: prfm pstl3keep, [x5, #0] +# CHECK: prfm pstl3strm, [x6, #0] +0xe0 0x07 0x80 0xf9 +0x61 0x00 0x80 0xf9 +0xa2 0x08 0x80 0xf9 +0x43 0x00 0x80 0xf9 +0xa4 0x00 0x80 0xf9 +0xc5 0x00 0x80 0xf9 +0xe8 0x07 0x80 0xf9 +0x69 0x00 0x80 0xf9 +0xaa 0x08 0x80 0xf9 +0x4b 0x00 0x80 0xf9 +0xac 0x00 0x80 0xf9 +0xcd 0x00 0x80 0xf9 +0xf0 0x07 0x80 0xf9 +0x71 0x00 0x80 0xf9 +0xb2 0x08 0x80 0xf9 +0x53 0x00 0x80 0xf9 +0xb4 0x00 0x80 0xf9 +0xd5 0x00 0x80 0xf9 + + #------------------------------------------------------------------------------ # Load/store (register offset) #------------------------------------------------------------------------------ |