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| author | Craig Topper <craig.topper@gmail.com> | 2011-10-15 20:46:47 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2011-10-15 20:46:47 +0000 |
| commit | 566f233ba64c0bb2773b5717cb18753c7564f4b7 (patch) | |
| tree | befeba913e8cabb5cdec9d4aa59a6b9700178645 /test/MC/Disassembler/X86/simple-tests.txt | |
| parent | 4d83b79c76044e3f3cefd2a6c1b0b792266935c8 (diff) | |
| download | external_llvm-566f233ba64c0bb2773b5717cb18753c7564f4b7.zip external_llvm-566f233ba64c0bb2773b5717cb18753c7564f4b7.tar.gz external_llvm-566f233ba64c0bb2773b5717cb18753c7564f4b7.tar.bz2 | |
Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work because these are the first VEX encoded instructions to use the reg field as an opcode extension.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142082 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler/X86/simple-tests.txt')
| -rw-r--r-- | test/MC/Disassembler/X86/simple-tests.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 2dc918c..93154f6 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -518,3 +518,21 @@ # CHECK: andnq (%rax), %r15, %rax 0xc4 0xe2 0x80 0xf2 0x00 + +# CHECK: blsrl (%rax), %r15d +0xc4 0xe2 0x00 0xf3 0x08 + +# CHECK: blsrq (%rax), %r15 +0xc4 0xe2 0x80 0xf3 0x08 + +# CHECK: blsmskl (%rax), %r15d +0xc4 0xe2 0x00 0xf3 0x10 + +# CHECK: blsmskq (%rax), %r15 +0xc4 0xe2 0x80 0xf3 0x10 + +# CHECK: blsil (%rax), %r15d +0xc4 0xe2 0x00 0xf3 0x18 + +# CHECK: blsiq (%rax), %r15 +0xc4 0xe2 0x80 0xf3 0x18 |