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| author | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-09-10 10:20:32 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@linux.vnet.ibm.com> | 2013-09-10 10:20:32 +0000 |
| commit | 299fdd814f4c2850d44387d24c440980c5377d3e (patch) | |
| tree | 23fd7cf5d7ab26e3e8decc4c20ddc80123053a09 /test/MC/Disassembler | |
| parent | 436f64567ceb0b45e6b5b680fa09485002094830 (diff) | |
| download | external_llvm-299fdd814f4c2850d44387d24c440980c5377d3e.zip external_llvm-299fdd814f4c2850d44387d24c440980c5377d3e.tar.gz external_llvm-299fdd814f4c2850d44387d24c440980c5377d3e.tar.bz2 | |
[SystemZ] Add TM and TMY
The main complication here is that TM and TMY (the memory forms) set
CC differently from the register forms. When the tested bits contain
some 0s and some 1s, the register forms set CC to 1 or 2 based on the
value the uppermost bit. The memory forms instead set CC to 1
regardless of the uppermost bit.
Until now, I've tried to make it so that a branch never tests for an
impossible CC value. E.g. NR only sets CC to 0 or 1, so branches on the
result will only test for 0 or 1. Originally I'd tried to do the same
thing for TM and TMY by using custom matching code in ISelDAGToDAG.
That ended up being very ugly though, and would have meant duplicating
some of the chain checks that the common isel code does.
I've therefore gone for the simpler alternative of adding an extra
operand to the TM DAG opcode to say whether a memory form would be OK.
This means that the inverse of a "TM;JE" is "TM;JNE" rather than the
more precise "TM;JNLE", just like the inverse of "TMLL;JE" is "TMLL;JNE".
I suppose that's arguably less confusing though...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190400 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
| -rw-r--r-- | test/MC/Disassembler/SystemZ/insns.txt | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/test/MC/Disassembler/SystemZ/insns.txt b/test/MC/Disassembler/SystemZ/insns.txt index f2cf322..4ac6031 100644 --- a/test/MC/Disassembler/SystemZ/insns.txt +++ b/test/MC/Disassembler/SystemZ/insns.txt @@ -7036,6 +7036,27 @@ # CHECK: sy %r15, 0 0xe3 0xf0 0x00 0x00 0x00 0x5b +# CHECK: tm 0, 0 +0x91 0x00 0x00 0x00 + +# CHECK: tm 4095, 0 +0x91 0x00 0x0f 0xff + +# CHECK: tm 0, 255 +0x91 0xff 0x00 0x00 + +# CHECK: tm 0(%r1), 42 +0x91 0x2a 0x10 0x00 + +# CHECK: tm 0(%r15), 42 +0x91 0x2a 0xf0 0x00 + +# CHECK: tm 4095(%r1), 42 +0x91 0x2a 0x1f 0xff + +# CHECK: tm 4095(%r15), 42 +0x91 0x2a 0xff 0xff + # CHECK: tmhh %r0, 0 0xa7 0x02 0x00 0x00 @@ -7084,6 +7105,36 @@ # CHECK: tmll %r15, 0 0xa7 0xf1 0x00 0x00 +# CHECK: tmy -524288, 0 +0xeb 0x00 0x00 0x00 0x80 0x51 + +# CHECK: tmy -1, 0 +0xeb 0x00 0x0f 0xff 0xff 0x51 + +# CHECK: tmy 0, 0 +0xeb 0x00 0x00 0x00 0x00 0x51 + +# CHECK: tmy 1, 0 +0xeb 0x00 0x00 0x01 0x00 0x51 + +# CHECK: tmy 524287, 0 +0xeb 0x00 0x0f 0xff 0x7f 0x51 + +# CHECK: tmy 0, 255 +0xeb 0xff 0x00 0x00 0x00 0x51 + +# CHECK: tmy 0(%r1), 42 +0xeb 0x2a 0x10 0x00 0x00 0x51 + +# CHECK: tmy 0(%r15), 42 +0xeb 0x2a 0xf0 0x00 0x00 0x51 + +# CHECK: tmy 524287(%r1), 42 +0xeb 0x2a 0x1f 0xff 0x7f 0x51 + +# CHECK: tmy 524287(%r15), 42 +0xeb 0x2a 0xff 0xff 0x7f 0x51 + # CHECK: xc 0(1), 0 0xd7 0x00 0x00 0x00 0x00 0x00 |