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| author | Richard Osborne <richard@xmos.com> | 2013-01-21 20:42:16 +0000 |
|---|---|---|
| committer | Richard Osborne <richard@xmos.com> | 2013-01-21 20:42:16 +0000 |
| commit | 9b709f8b3f3fa6e9bfb5007b70e096f6192f3ef8 (patch) | |
| tree | 9ef864c103916ee8ad7fc1e09bc1a770af644a56 /test/MC/Disassembler | |
| parent | a3458380b97bd732baf84f1bf0d21f215bf99727 (diff) | |
| download | external_llvm-9b709f8b3f3fa6e9bfb5007b70e096f6192f3ef8.zip external_llvm-9b709f8b3f3fa6e9bfb5007b70e096f6192f3ef8.tar.gz external_llvm-9b709f8b3f3fa6e9bfb5007b70e096f6192f3ef8.tar.bz2 | |
Add instruction encoding / disassembly support for ru6 / lru6 instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173085 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
| -rw-r--r-- | test/MC/Disassembler/XCore/xcore.txt | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index 7b5d512..507c762 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -312,3 +312,83 @@ # CHECK: ldaw r8, r2[-9] 0x09 0xfd 0xec 0xa7 + +# ru6 / lru6 instructions + +# CHECK: bt r6, -5 +0x85 0x75 + +# CHECK: bt r10, -451 +0x07 0xf0 0x83 0x76 + +# CHECK: bt r8, 10 +0x0a 0x72 + +# CHECK: bt r1, 6451 +0x64 0xf0 0x73 0x70 + +# CHECK: bf r5, 8 +0x48 0x79 + +# CHECK: bf r6, 65 +0x01 0xf0 0x81 0x79 + +# CHECK: bf r1, 53 +0x75 0x78 + +# CHECK: bf r10, 101 +0x01 0xf0 0xa5 0x7a + +# CHECK: ldaw r11, dp[63] +0xff 0x62 + +# CHECK: ldaw r1, dp[456] +0x07 0xf0 0x48 0x60 + +# CHECK: ldaw r3, sp[2] +0xc2 0x64 + +# CHECK: ldaw r8, sp[65535] +0xff 0xf3 0x3f 0x66 + +# CHECK: ldc r3, 30 +0xde 0x68 + +# CHECK: ldc r11, 1000 +0x0f 0xf0 0xe8 0x6a + +# CHECK: ldw r0, cp[4] +0x04 0x6c + +# CHECK: ldw r1, cp[32345] +0xf9 0xf1 0x59 0x6c + +# CHECK: ldw r10, dp[16] +0x90 0x5a + +# CHECK: ldw r10, dp[76] +0x01 0xf0 0x8c 0x5a + +# CHECK: ldw r8, sp[51] +0x33 0x5e + +# CHECK: ldw r8, sp[1225] +0x13 0xf0 0x09 0x5e + +# CHECK: setc res[r5], 36 +0x64 0xe9 + +# CHECK: setc res[r2], 40312 +0x75 0xf2 0xb8 0xe8 + +# CHECK: stw r8, dp[14] +0x0e 0x52 + +# CHECK: stw r9, dp[654] +0x0a 0xf0 0x4e 0x52 + +# CHECK: stw r1, sp[32] +0x60 0x54 + +# CHECK: stw r0, sp[8761] +0x88 0xf0 0x39 0x54 |