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authorSilviu Baranga <silviu.baranga@arm.com>2012-03-22 13:24:43 +0000
committerSilviu Baranga <silviu.baranga@arm.com>2012-03-22 13:24:43 +0000
commitb7c2ed66642b141a768b3074c465eba9d98665d8 (patch)
tree3b9cf751c317bcd4b0b27bd71f4769ca7ab0a359 /test/MC/Disassembler
parenta0c48eb8f69bcb619a2c2cc0044375bb4171cebe (diff)
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Added soft fail cases for the disassembler when decoding LDRSBT, LDRHT or LDRSHT instruction on ARM
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153251 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Disassembler')
-rw-r--r--test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt22
1 files changed, 22 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt b/test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt
new file mode 100644
index 0000000..ed5e350
--- /dev/null
+++ b/test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt
@@ -0,0 +1,22 @@
+# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s
+
+# CHECK: potentially undefined
+# CHECK: 0xff 0x00 0xb9 0x00
+0xff 0x00 0xb9 0x00
+
+# CHECK: potentially undefined
+# CHECK: 0xfb 0xf0 0xb9 0x00
+0xfb 0xf0 0xb9 0x00
+
+# CHECK: potentially undefined
+# CHECK: 0xfb 0x01 0xb9 0x00
+0xfb 0x01 0xb9 0x00
+
+# CHECK: potentially undefined
+# CHECK: 0xfb 0x00 0xbf 0x00
+0xfb 0x00 0xbf 0x00
+
+# CHECK: potentially undefined
+# CHECK: 0xfb 0x90 0xb9 0x00
+0xfb 0x90 0xb9 0x00
+