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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-02 21:31:59 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-02 21:31:59 +0000 |
| commit | 25b9bbae69befa03cc48d4be73b741eff8e523bc (patch) | |
| tree | ea16cb7a13f853a8465d5fc8b4192bf8b3e08bdb /test/MC/PowerPC | |
| parent | a17a7e1868076a4430cfa16694bcb42884130928 (diff) | |
| download | external_llvm-25b9bbae69befa03cc48d4be73b741eff8e523bc.zip external_llvm-25b9bbae69befa03cc48d4be73b741eff8e523bc.tar.gz external_llvm-25b9bbae69befa03cc48d4be73b741eff8e523bc.tar.bz2 | |
[PowerPC] PR16512 - Support TLS call sequences in the asm parser
This patch now adds support for recognizing TLS call sequences in
the asm parser. This needs a new pattern BL8_TLS, which is like
BL8_NOP_TLS except without nop. That pattern is used for the
asm parser only.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185478 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/PowerPC')
| -rw-r--r-- | test/MC/PowerPC/ppc64-fixups.s | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/test/MC/PowerPC/ppc64-fixups.s b/test/MC/PowerPC/ppc64-fixups.s index 612c899..937e557 100644 --- a/test/MC/PowerPC/ppc64-fixups.s +++ b/test/MC/PowerPC/ppc64-fixups.s @@ -391,6 +391,20 @@ base: # CHECK-REL: 0x{{[0-9A-F]*[26AE]}} R_PPC64_GOT_TLSLD16 target 0x0 addi 3, 3, target@got@tlsld +# CHECK: bl __tls_get_addr(target@TLSGD) # encoding: [0b010010BB,B,B,0bBBBBBB01] +# CHECK-NEXT: # fixup A - offset: 0, value: target@TLSGD, kind: fixup_ppc_nofixup +# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24 +# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSGD target 0x0 +# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0 + bl __tls_get_addr(target@tlsgd) + +# CHECK: bl __tls_get_addr(target@TLSLD) # encoding: [0b010010BB,B,B,0bBBBBBB01] +# CHECK-NEXT: # fixup A - offset: 0, value: target@TLSLD, kind: fixup_ppc_nofixup +# CHECK-NEXT: # fixup B - offset: 0, value: __tls_get_addr, kind: fixup_ppc_br24 +# CHECK-REL: 0x{{[0-9A-F]*[048C]}} R_PPC64_TLSLD target 0x0 +# CHECK-REL-NEXT: 0x{{[0-9A-F]*[048C]}} R_PPC64_REL24 __tls_get_addr 0x0 + bl __tls_get_addr(target@tlsld) + # Data relocs # llvm-mc does not show any "encoding" string for data, so we just check the relocs |