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| author | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-03 12:32:41 +0000 |
|---|---|---|
| committer | Ulrich Weigand <ulrich.weigand@de.ibm.com> | 2013-07-03 12:32:41 +0000 |
| commit | 44175d9715268bfb7c2cb10ebf14474f4a411464 (patch) | |
| tree | ca59d093b0fdd19b3205fd68deb16417bbf1abc7 /test/MC/PowerPC | |
| parent | fa487e83a83c260d6a50f3df00a0eb012553a912 (diff) | |
| download | external_llvm-44175d9715268bfb7c2cb10ebf14474f4a411464.zip external_llvm-44175d9715268bfb7c2cb10ebf14474f4a411464.tar.gz external_llvm-44175d9715268bfb7c2cb10ebf14474f4a411464.tar.bz2 | |
[PowerPC] Support mtspr/mfspr in the asm parser
This adds support for the generic forms of mtspr/mfspr
for the asm parser. The compiler will continue to use
the specialized patters for mtlr etc. since those are
needed to correctly describe data flow.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185532 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/PowerPC')
| -rw-r--r-- | test/MC/PowerPC/ppc64-encoding-ext.s | 6 | ||||
| -rw-r--r-- | test/MC/PowerPC/ppc64-encoding.s | 6 |
2 files changed, 8 insertions, 4 deletions
diff --git a/test/MC/PowerPC/ppc64-encoding-ext.s b/test/MC/PowerPC/ppc64-encoding-ext.s index d2288a5..79c8fdb 100644 --- a/test/MC/PowerPC/ppc64-encoding-ext.s +++ b/test/MC/PowerPC/ppc64-encoding-ext.s @@ -1953,8 +1953,10 @@ # Move to/from special purpose register mnemonics -# FIXME: mtxer 2 -# FIXME: mfxer 2 +# CHECK: mtspr 1, 2 # encoding: [0x7c,0x41,0x03,0xa6] + mtxer 2 +# CHECK: mfspr 2, 1 # encoding: [0x7c,0x41,0x02,0xa6] + mfxer 2 # CHECK: mtlr 2 # encoding: [0x7c,0x48,0x03,0xa6] mtlr 2 # CHECK: mflr 2 # encoding: [0x7c,0x48,0x02,0xa6] diff --git a/test/MC/PowerPC/ppc64-encoding.s b/test/MC/PowerPC/ppc64-encoding.s index fcf2407..fbedf43 100644 --- a/test/MC/PowerPC/ppc64-encoding.s +++ b/test/MC/PowerPC/ppc64-encoding.s @@ -504,8 +504,10 @@ # Move to/from system register instructions -# FIXME: mtspr 256, 2 -# FIXME: mfspr 2, 256 +# CHECK: mtspr 600, 2 # encoding: [0x7c,0x58,0x93,0xa6] + mtspr 600, 2 +# CHECK: mfspr 2, 600 # encoding: [0x7c,0x58,0x92,0xa6] + mfspr 2, 600 # CHECK: mtcrf 16, 2 # encoding: [0x7c,0x41,0x01,0x20] mtcrf 16, 2 # CHECK: mfcr 2 # encoding: [0x7c,0x40,0x00,0x26] |