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author | Stephen Hines <srhines@google.com> | 2014-12-01 14:51:49 -0800 |
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committer | Stephen Hines <srhines@google.com> | 2014-12-02 16:08:10 -0800 |
commit | 37ed9c199ca639565f6ce88105f9e39e898d82d0 (patch) | |
tree | 8fb36d3910e3ee4c4e1b7422f4f017108efc52f5 /test/TableGen/BitOffsetDecoder.td | |
parent | d2327b22152ced7bc46dc629fc908959e8a52d03 (diff) | |
download | external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.zip external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.gz external_llvm-37ed9c199ca639565f6ce88105f9e39e898d82d0.tar.bz2 |
Update aosp/master LLVM for rebase to r222494.
Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
Diffstat (limited to 'test/TableGen/BitOffsetDecoder.td')
-rw-r--r-- | test/TableGen/BitOffsetDecoder.td | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/test/TableGen/BitOffsetDecoder.td b/test/TableGen/BitOffsetDecoder.td new file mode 100644 index 0000000..ec0ceee --- /dev/null +++ b/test/TableGen/BitOffsetDecoder.td @@ -0,0 +1,74 @@ +// RUN: llvm-tblgen -gen-disassembler -I %p/../../include %s | FileCheck %s + +include "llvm/Target/Target.td" + +def archInstrInfo : InstrInfo { } + +def arch : Target { + let InstructionSet = archInstrInfo; +} + +def Myi32 : Operand<i32> { + let DecoderMethod = "DecodeMyi32"; +} + + +let OutOperandList = (outs), Size = 2 in { + +def foo : Instruction { + let InOperandList = (ins i32imm:$factor); + field bits<16> Inst; + bits<32> factor; + let Inst{7-0} = 0xAA; + let Inst{14-8} = factor{6-0}; // no offset + let AsmString = "foo $factor"; + field bits<16> SoftFail = 0; + } + +def bar : Instruction { + let InOperandList = (ins i32imm:$factor); + field bits<16> Inst; + bits<32> factor; + let Inst{7-0} = 0xBB; + let Inst{15-8} = factor{10-3}; // offset by 3 + let AsmString = "bar $factor"; + field bits<16> SoftFail = 0; + } + +def biz : Instruction { + let InOperandList = (ins i32imm:$factor); + field bits<16> Inst; + bits<32> factor; + let Inst{7-0} = 0xCC; + let Inst{11-8,15-12} = factor{10-3}; // offset by 3, multipart + let AsmString = "biz $factor"; + field bits<16> SoftFail = 0; + } + +def baz : Instruction { + let InOperandList = (ins Myi32:$factor); + field bits<16> Inst; + bits<32> factor; + let Inst{7-0} = 0xDD; + let Inst{15-8} = factor{11-4}; // offset by 4 + custom decode + let AsmString = "baz $factor"; + field bits<16> SoftFail = 0; + } + +def bum : Instruction { + let InOperandList = (ins i32imm:$factor); + field bits<16> Inst; + bits<32> factor; + let Inst{7-0} = 0xEE; + let Inst{15-8} = !srl(factor,5); + let AsmString = "bum $factor"; + field bits<16> SoftFail = 0; + } +} + + +// CHECK: tmp = fieldFromInstruction(insn, 8, 7); +// CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 3; +// CHECK: tmp |= fieldFromInstruction(insn, 8, 4) << 7; +// CHECK: tmp |= fieldFromInstruction(insn, 12, 4) << 3; +// CHECK: tmp = fieldFromInstruction(insn, 8, 8) << 4; |