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| author | Tim Northover <tnorthover@apple.com> | 2013-05-31 13:47:25 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-05-31 13:47:25 +0000 |
| commit | e93c701cac2ac62bcd390b978604da76be9967d0 (patch) | |
| tree | da4b95d57adc4fa985e00e8f78ec3a581a420234 /test/TableGen/Include.inc | |
| parent | b6606e46abad12a112a57048caec2142522bc67d (diff) | |
| download | external_llvm-e93c701cac2ac62bcd390b978604da76be9967d0.zip external_llvm-e93c701cac2ac62bcd390b978604da76be9967d0.tar.gz external_llvm-e93c701cac2ac62bcd390b978604da76be9967d0.tar.bz2 | |
ARM: fix VEXT encoding corner case
The disassembly of VEXT instructions was too lax in the bits checked. This
fixes the case where the instruction affects Q-registers but a misaligned lane
was specified (should be UNDEFINED).
Patch by Amaury de la Vieuville
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183003 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/TableGen/Include.inc')
0 files changed, 0 insertions, 0 deletions