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author | Dan Gohman <djg@cray.com> | 2008-02-10 18:45:23 +0000 |
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committer | Dan Gohman <djg@cray.com> | 2008-02-10 18:45:23 +0000 |
commit | 1e57df3b4fd69b2a316d8931dee1b9e033ae3a9a (patch) | |
tree | 24ca65a47eb4948b2fbbc5cfeb1ebfc270bcd45e /test/TableGen | |
parent | b6eca4866bd51ed70374af72101bde4d7b285476 (diff) | |
download | external_llvm-1e57df3b4fd69b2a316d8931dee1b9e033ae3a9a.zip external_llvm-1e57df3b4fd69b2a316d8931dee1b9e033ae3a9a.tar.gz external_llvm-1e57df3b4fd69b2a316d8931dee1b9e033ae3a9a.tar.bz2 |
Rename MRegisterInfo to TargetRegisterInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46930 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/TableGen')
-rw-r--r-- | test/TableGen/TargetInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/TableGen/TargetInstrInfo.td b/test/TableGen/TargetInstrInfo.td index bbee743..8299541 100644 --- a/test/TableGen/TargetInstrInfo.td +++ b/test/TableGen/TargetInstrInfo.td @@ -83,7 +83,7 @@ class Inst<dag opnds, string asmstr, bits<8> opcode, // 6. Address expressions should become first-class entities. // Simple copy instruction. isMoveInstr could easily be inferred from this, -// as could MRegisterInfo::copyRegToReg. +// as could TargetRegisterInfo::copyRegToReg. def MOV8rr : Inst<(ops R8:$dst, R8:$src), "mov $dst, $src", 0x88, MRMDestReg, [(set R8:$dst, R8:$src)]>; |