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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 22:08:18 +0000
committerAndroid Git Automerger <android-git-automerger@android.com>2015-04-10 22:08:18 +0000
commit13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Transforms/ArgumentPromotion/reserve-tbaa.ll
parent0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff)
parent31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff)
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am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949': Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Transforms/ArgumentPromotion/reserve-tbaa.ll')
-rw-r--r--test/Transforms/ArgumentPromotion/reserve-tbaa.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/test/Transforms/ArgumentPromotion/reserve-tbaa.ll b/test/Transforms/ArgumentPromotion/reserve-tbaa.ll
index db9d70d..3c8ed79 100644
--- a/test/Transforms/ArgumentPromotion/reserve-tbaa.ll
+++ b/test/Transforms/ArgumentPromotion/reserve-tbaa.ll
@@ -14,9 +14,9 @@
define internal fastcc void @fn(i32* nocapture readonly %p1, i64* nocapture readonly %p2) {
entry:
- %0 = load i64* %p2, align 8, !tbaa !1
+ %0 = load i64, i64* %p2, align 8, !tbaa !1
%conv = trunc i64 %0 to i32
- %1 = load i32* %p1, align 4, !tbaa !5
+ %1 = load i32, i32* %p1, align 4, !tbaa !5
%conv1 = trunc i32 %1 to i8
store i8 %conv1, i8* @d, align 1, !tbaa !7
ret void
@@ -26,11 +26,11 @@ define i32 @main() {
entry:
; CHECK-LABEL: main
; CHECK: store i32 1, i32* %{{.*}}, align 4, !tbaa ![[I32:[0-9]+]]
-; CHECK: %g.val = load i32* @g, align 4, !tbaa ![[I32]]
-; CHECK: %c.val = load i64* @c, align 8, !tbaa ![[LONG:[0-9]+]]
- %0 = load i32*** @e, align 8, !tbaa !8
+; CHECK: %g.val = load i32, i32* @g, align 4, !tbaa ![[I32]]
+; CHECK: %c.val = load i64, i64* @c, align 8, !tbaa ![[LONG:[0-9]+]]
+ %0 = load i32**, i32*** @e, align 8, !tbaa !8
store i32* @g, i32** %0, align 8, !tbaa !8
- %1 = load i32** @a, align 8, !tbaa !8
+ %1 = load i32*, i32** @a, align 8, !tbaa !8
store i32 1, i32* %1, align 4, !tbaa !5
call fastcc void @fn(i32* @g, i64* @c)