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author | Pirama Arumuga Nainar <pirama@google.com> | 2015-04-10 22:08:18 +0000 |
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committer | Android Git Automerger <android-git-automerger@android.com> | 2015-04-10 22:08:18 +0000 |
commit | 13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch) | |
tree | 1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll | |
parent | 0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff) | |
parent | 31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff) | |
download | external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.bz2 |
am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949':
Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll')
-rw-r--r-- | test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll b/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll index a007ca6..f2afaf4 100644 --- a/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll +++ b/test/Transforms/IndVarSimplify/promote-iv-to-eliminate-casts.ll @@ -1,5 +1,8 @@ -; RUN: opt < %s -indvars -S > %t -; RUN: not grep sext %t +; RUN: opt < %s -indvars -S | not grep sext + +; Provide legal integer types. +target datalayout = "n8:16:32:64" + define i64 @test(i64* nocapture %first, i32 %count) nounwind readonly { entry: @@ -13,8 +16,8 @@ bb: ; preds = %bb1, %bb.nph %result.02 = phi i64 [ %t5, %bb1 ], [ 0, %bb.nph ] ; <i64> [#uses=1] %n.01 = phi i32 [ %t6, %bb1 ], [ 0, %bb.nph ] ; <i32> [#uses=2] %t1 = sext i32 %n.01 to i64 ; <i64> [#uses=1] - %t2 = getelementptr i64* %first, i64 %t1 ; <i64*> [#uses=1] - %t3 = load i64* %t2, align 8 ; <i64> [#uses=1] + %t2 = getelementptr i64, i64* %first, i64 %t1 ; <i64*> [#uses=1] + %t3 = load i64, i64* %t2, align 8 ; <i64> [#uses=1] %t4 = lshr i64 %t3, 4 ; <i64> [#uses=1] %t5 = add i64 %t4, %result.02 ; <i64> [#uses=2] %t6 = add i32 %n.01, 1 ; <i32> [#uses=2] @@ -44,7 +47,7 @@ bb.nph: ; preds = %entry bb: ; preds = %bb1, %bb.nph %i.01 = phi i16 [ %t3, %bb1 ], [ 0, %bb.nph ] ; <i16> [#uses=2] %t1 = sext i16 %i.01 to i64 ; <i64> [#uses=1] - %t2 = getelementptr i32* %P, i64 %t1 ; <i32*> [#uses=1] + %t2 = getelementptr i32, i32* %P, i64 %t1 ; <i32*> [#uses=1] store i32 123, i32* %t2, align 4 %t3 = add i16 %i.01, 1 ; <i16> [#uses=2] br label %bb1 @@ -70,7 +73,7 @@ bb: ; preds = %bb, %bb.thread %i.0.reg2mem.0 = phi i8 [ -10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2] %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1] %tmp4 = add i32 %tmp12, 10 ; <i32> [#uses=1] - %tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1] + %tmp5 = getelementptr [21 x i32], [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1] store i32 0, i32* %tmp5 %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2] %0 = icmp sgt i8 %tmp7, 10 ; <i1> [#uses=1] @@ -88,7 +91,7 @@ bb: ; preds = %bb, %bb.thread %i.0.reg2mem.0 = phi i8 [ 10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2] %tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1] %tmp4 = add i32 %tmp12, -10 ; <i32> [#uses=1] - %tmp5 = getelementptr [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1] + %tmp5 = getelementptr [21 x i32], [21 x i32]* %a, i32 0, i32 %tmp4 ; <i32*> [#uses=1] store i32 0, i32* %tmp5 %tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2] %0 = icmp sgt i8 %tmp7, 30 ; <i1> [#uses=1] |