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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 22:08:18 +0000
committerAndroid Git Automerger <android-git-automerger@android.com>2015-04-10 22:08:18 +0000
commit13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Transforms/InstCombine/crash.ll
parent0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff)
parent31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff)
downloadexternal_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.zip
external_llvm-13a7db5b9c4f5e543d037be68ec3428216bfd550.tar.gz
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am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949': Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Transforms/InstCombine/crash.ll')
-rw-r--r--test/Transforms/InstCombine/crash.ll38
1 files changed, 19 insertions, 19 deletions
diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll
index 2ef6ac6..2d93ecd 100644
--- a/test/Transforms/InstCombine/crash.ll
+++ b/test/Transforms/InstCombine/crash.ll
@@ -35,12 +35,12 @@ entry:
; PR4908
define void @test2(<1 x i16>* nocapture %b, i32* nocapture %c) nounwind ssp {
entry:
- %arrayidx = getelementptr inbounds <1 x i16>* %b, i64 undef ; <<1 x i16>*>
- %tmp2 = load <1 x i16>* %arrayidx ; <<1 x i16>> [#uses=1]
+ %arrayidx = getelementptr inbounds <1 x i16>, <1 x i16>* %b, i64 undef ; <<1 x i16>*>
+ %tmp2 = load <1 x i16>, <1 x i16>* %arrayidx ; <<1 x i16>> [#uses=1]
%tmp6 = bitcast <1 x i16> %tmp2 to i16 ; <i16> [#uses=1]
%tmp7 = zext i16 %tmp6 to i32 ; <i32> [#uses=1]
%ins = or i32 0, %tmp7 ; <i32> [#uses=1]
- %arrayidx20 = getelementptr inbounds i32* %c, i64 undef ; <i32*> [#uses=1]
+ %arrayidx20 = getelementptr inbounds i32, i32* %c, i64 undef ; <i32*> [#uses=1]
store i32 %ins, i32* %arrayidx20
ret void
}
@@ -60,7 +60,7 @@ define void @foo(i1) nounwind align 2 {
; <label>:3 ; preds = %2, %1
%4 = phi i8 [ 1, %2 ], [ 0, %1 ] ; <i8> [#uses=1]
%5 = icmp eq i8 %4, 0 ; <i1> [#uses=1]
- %6 = load i64* @tmp2, align 8 ; <i64> [#uses=1]
+ %6 = load i64, i64* @tmp2, align 8 ; <i64> [#uses=1]
%7 = select i1 %5, i64 0, i64 %6 ; <i64> [#uses=1]
br label %8
@@ -79,9 +79,9 @@ define void @bar3(i1, i1) nounwind align 2 {
br i1 %1, label %10, label %3
; <label>:3 ; preds = %2
- %4 = getelementptr inbounds %t0* null, i64 0, i32 1 ; <i32*> [#uses=0]
- %5 = getelementptr inbounds %t1* null, i64 0, i32 4 ; <i32**> [#uses=1]
- %6 = load i32** %5, align 8 ; <i32*> [#uses=1]
+ %4 = getelementptr inbounds %t0, %t0* null, i64 0, i32 1 ; <i32*> [#uses=0]
+ %5 = getelementptr inbounds %t1, %t1* null, i64 0, i32 4 ; <i32**> [#uses=1]
+ %6 = load i32*, i32** %5, align 8 ; <i32*> [#uses=1]
%7 = icmp ne i32* %6, null ; <i1> [#uses=1]
%8 = zext i1 %7 to i32 ; <i32> [#uses=1]
%9 = add i32 %8, 0 ; <i32> [#uses=1]
@@ -115,7 +115,7 @@ BB1:
BB2:
%v5_ = phi i1 [ true, %BB0], [false, %BB1]
- %v6 = load i64* %P
+ %v6 = load i64, i64* %P
br label %l8
l8:
@@ -149,7 +149,7 @@ exit:
define arm_aapcs_vfpcc i32 @test6(i32 %argc, i8** %argv) nounwind {
entry:
- store i32* getelementptr (i32* bitcast (i32 (i32, i8**)* @test6 to i32*), i32 -2048), i32** @test6g, align 4
+ store i32* getelementptr (i32, i32* bitcast (i32 (i32, i8**)* @test6 to i32*), i32 -2048), i32** @test6g, align 4
unreachable
}
@@ -182,8 +182,8 @@ cont: ; preds = %ehcleanup
resume { i8*, i32 } %exc1
cond.false: ; preds = %entry
- %tmp4 = getelementptr inbounds %class.RuleBasedBreakIterator* %this, i32 0, i32 0 ; <i64 ()**> [#uses=1]
- %tmp5 = load i64 ()** %tmp4 ; <i64 ()*> [#uses=1]
+ %tmp4 = getelementptr inbounds %class.RuleBasedBreakIterator, %class.RuleBasedBreakIterator* %this, i32 0, i32 0 ; <i64 ()**> [#uses=1]
+ %tmp5 = load i64 ()*, i64 ()** %tmp4 ; <i64 ()*> [#uses=1]
%call = invoke i64 %tmp5()
to label %cond.end unwind label %ehcleanup ; <i64> [#uses=1]
@@ -242,10 +242,10 @@ entry:
; PR6503
define void @test12(i32* %A) nounwind {
entry:
- %tmp1 = load i32* %A
+ %tmp1 = load i32, i32* %A
%cmp = icmp ugt i32 1, %tmp1 ; <i1> [#uses=1]
%conv = zext i1 %cmp to i32 ; <i32> [#uses=1]
- %tmp2 = load i32* %A
+ %tmp2 = load i32, i32* %A
%cmp3 = icmp ne i32 %tmp2, 0 ; <i1> [#uses=1]
%conv4 = zext i1 %cmp3 to i32 ; <i32> [#uses=1]
%or = or i32 %conv, %conv4 ; <i32> [#uses=1]
@@ -258,10 +258,10 @@ entry:
%s2 = type { i64 }
define void @test13() nounwind ssp {
entry:
- %0 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 0, i32 0
+ %0 = getelementptr inbounds %s1, %s1* null, i64 0, i32 2, i64 0, i32 0
%1 = bitcast i64* %0 to i32*
- %2 = getelementptr inbounds %s1* null, i64 0, i32 2, i64 1, i32 0
- %.pre = load i32* %1, align 8
+ %2 = getelementptr inbounds %s1, %s1* null, i64 0, i32 2, i64 1, i32 0
+ %.pre = load i32, i32* %1, align 8
%3 = lshr i32 %.pre, 19
%brmerge = or i1 undef, undef
%4 = and i32 %3, 3
@@ -269,7 +269,7 @@ entry:
%6 = shl i32 %5, 19
%7 = add i32 %6, 1572864
%8 = and i32 %7, 1572864
- %9 = load i64* %2, align 8
+ %9 = load i64, i64* %2, align 8
%trunc156 = trunc i64 %9 to i32
%10 = and i32 %trunc156, -1537
%11 = and i32 %10, -6145
@@ -304,7 +304,7 @@ entry:
define void @test15(i32* %p_92) nounwind {
entry:
-%0 = load i32* %p_92, align 4
+%0 = load i32, i32* %p_92, align 4
%1 = icmp ne i32 %0, 0
%2 = zext i1 %1 to i32
%3 = call i32 @func_14() nounwind
@@ -349,7 +349,7 @@ define double @test16(i32 %a) nounwind {
define %struct.basic_ios *@test17() ssp {
entry:
- %add.ptr.i = getelementptr i8* null, i64 undef
+ %add.ptr.i = getelementptr i8, i8* null, i64 undef
%0 = bitcast i8* %add.ptr.i to %struct.basic_ios*
ret %struct.basic_ios* %0
}