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| author | Stephen Hines <srhines@google.com> | 2015-04-01 18:49:24 +0000 |
|---|---|---|
| committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2015-04-01 18:49:26 +0000 |
| commit | 3fa16bd6062e23bcdb82ed4dd965674792e6b761 (patch) | |
| tree | 9348fc507292f7e8715d22d64ce5a32131b4f875 /test/Transforms/InstCombine/div.ll | |
| parent | beed47390a60f6f0c77532b3d3f76bb47ef49423 (diff) | |
| parent | ebe69fe11e48d322045d5949c83283927a0d790b (diff) | |
| download | external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.zip external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.gz external_llvm-3fa16bd6062e23bcdb82ed4dd965674792e6b761.tar.bz2 | |
Merge "Update aosp/master LLVM for rebase to r230699."
Diffstat (limited to 'test/Transforms/InstCombine/div.ll')
| -rw-r--r-- | test/Transforms/InstCombine/div.ll | 43 |
1 files changed, 41 insertions, 2 deletions
diff --git a/test/Transforms/InstCombine/div.ll b/test/Transforms/InstCombine/div.ll index 2841043..e0ff07b 100644 --- a/test/Transforms/InstCombine/div.ll +++ b/test/Transforms/InstCombine/div.ll @@ -217,7 +217,7 @@ define i32 @test25(i32 %a) { %div = sdiv i32 %shl, 2 ret i32 %div ; CHECK-LABEL: @test25( -; CHECK-NEXT: %div = shl i32 %a, 1 +; CHECK-NEXT: %div = shl nsw i32 %a, 1 ; CHECK-NEXT: ret i32 %div } @@ -226,7 +226,7 @@ define i32 @test26(i32 %a) { %div = sdiv i32 %mul, 3 ret i32 %div ; CHECK-LABEL: @test26( -; CHECK-NEXT: %div = shl i32 %a, 2 +; CHECK-NEXT: %div = shl nsw i32 %a, 2 ; CHECK-NEXT: ret i32 %div } @@ -286,3 +286,42 @@ define i32 @test32(i32 %a, i32 %b) { ; CHECK-NEXT: %[[div:.*]] = udiv i32 %a, %[[shr]] ; CHECK-NEXT: ret i32 } + +define <2 x i64> @test33(<2 x i64> %x) nounwind { + %shr = lshr exact <2 x i64> %x, <i64 5, i64 5> + %div = udiv exact <2 x i64> %shr, <i64 6, i64 6> + ret <2 x i64> %div +; CHECK-LABEL: @test33( +; CHECK-NEXT: udiv exact <2 x i64> %x, <i64 192, i64 192> +; CHECK-NEXT: ret <2 x i64> +} + +define <2 x i64> @test34(<2 x i64> %x) nounwind { + %neg = sub nsw <2 x i64> zeroinitializer, %x + %div = sdiv exact <2 x i64> %neg, <i64 3, i64 4> + ret <2 x i64> %div +; CHECK-LABEL: @test34( +; CHECK-NEXT: sdiv exact <2 x i64> %x, <i64 -3, i64 -4> +; CHECK-NEXT: ret <2 x i64> +} + +define i32 @test35(i32 %A) { + %and = and i32 %A, 2147483647 + %mul = sdiv exact i32 %and, 2147483647 + ret i32 %mul +; CHECK-LABEL: @test35( +; CHECK-NEXT: %[[and:.*]] = and i32 %A, 2147483647 +; CHECK-NEXT: %[[udiv:.*]] = udiv exact i32 %[[and]], 2147483647 +; CHECK-NEXT: ret i32 %[[udiv]] +} + +define i32 @test36(i32 %A) { + %and = and i32 %A, 2147483647 + %shl = shl nsw i32 1, %A + %mul = sdiv exact i32 %and, %shl + ret i32 %mul +; CHECK-LABEL: @test36( +; CHECK-NEXT: %[[and:.*]] = and i32 %A, 2147483647 +; CHECK-NEXT: %[[shr:.*]] = lshr exact i32 %[[and]], %A +; CHECK-NEXT: ret i32 %[[shr]] +} |