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| author | David Majnemer <david.majnemer@gmail.com> | 2013-04-14 21:15:43 +0000 |
|---|---|---|
| committer | David Majnemer <david.majnemer@gmail.com> | 2013-04-14 21:15:43 +0000 |
| commit | 024d943bca85ee0b6bc1b9e5f13ec5276f16c13d (patch) | |
| tree | 81479f985b66d217409d4160a4d0d47effb2b85c /test/Transforms/InstCombine | |
| parent | 687a9dfcb9a5f39e3252b2bd8d83642be02dc235 (diff) | |
| download | external_llvm-024d943bca85ee0b6bc1b9e5f13ec5276f16c13d.zip external_llvm-024d943bca85ee0b6bc1b9e5f13ec5276f16c13d.tar.gz external_llvm-024d943bca85ee0b6bc1b9e5f13ec5276f16c13d.tar.bz2 | |
Reorders two transforms that collide with each other
One performs: (X == 13 | X == 14) -> X-13 <u 2
The other: (A == C1 || A == C2) -> (A & ~(C1 ^ C2)) == C1
The problem is that there are certain values of C1 and C2 that
trigger both transforms but the first one blocks out the second,
this generates suboptimal code.
Reordering the transforms should be better in every case and
allows us to do interesting stuff like turn:
%shr = lshr i32 %X, 4
%and = and i32 %shr, 15
%add = add i32 %and, -14
%tobool = icmp ne i32 %add, 0
into:
%and = and i32 %X, 240
%tobool = icmp ne i32 %and, 224
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179493 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/InstCombine')
| -rw-r--r-- | test/Transforms/InstCombine/icmp.ll | 12 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/load-cmp.ll | 4 | ||||
| -rw-r--r-- | test/Transforms/InstCombine/or.ll | 6 |
3 files changed, 17 insertions, 5 deletions
diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll index 74adbba..c912a57 100644 --- a/test/Transforms/InstCombine/icmp.ll +++ b/test/Transforms/InstCombine/icmp.ll @@ -964,3 +964,15 @@ define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) { %cmp = icmp eq i32 %and, 0 ret i1 %cmp } + +; CHECK: @icmp_add_and_shr_ne_0 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %X, 240 +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 224 +; CHECK-NEXT: ret i1 [[CMP]] +define i1 @icmp_add_and_shr_ne_0(i32 %X) { + %shr = lshr i32 %X, 4 + %and = and i32 %shr, 15 + %add = add i32 %and, -14 + %tobool = icmp ne i32 %add, 0 + ret i1 %tobool +} diff --git a/test/Transforms/InstCombine/load-cmp.ll b/test/Transforms/InstCombine/load-cmp.ll index d88188e..869215c 100644 --- a/test/Transforms/InstCombine/load-cmp.ll +++ b/test/Transforms/InstCombine/load-cmp.ll @@ -100,8 +100,8 @@ define i1 @test8(i32 %X) { %S = icmp eq i16 %R, 0 ret i1 %S ; CHECK: @test8 -; CHECK-NEXT: add i32 %X, -8 -; CHECK-NEXT: icmp ult i32 {{.*}}, 2 +; CHECK-NEXT: and i32 %X, -2 +; CHECK-NEXT: icmp eq i32 {{.*}}, 8 ; CHECK-NEXT: ret i1 } diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index bde2a54..7226bd9 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -178,12 +178,12 @@ define i1 @test18(i32 %A) { define i1 @test19(i32 %A) { %B = icmp eq i32 %A, 50 %C = icmp eq i32 %A, 51 - ;; (A-50) < 2 + ;; (A&-2) == 50 %D = or i1 %B, %C ret i1 %D ; CHECK: @test19 -; CHECK: add i32 -; CHECK: icmp ult +; CHECK: and i32 +; CHECK: icmp eq ; CHECK: ret i1 } |