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author | Nadav Rotem <nrotem@apple.com> | 2012-08-14 05:19:07 +0000 |
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committer | Nadav Rotem <nrotem@apple.com> | 2012-08-14 05:19:07 +0000 |
commit | 3e883734fab4da8413f16957dd116d4ffd9d3223 (patch) | |
tree | 3165c1b0a62a477da5ca386e10ee5dc97d752da3 /test/Transforms/LoopStrengthReduce/ARM | |
parent | 443c9ed7688e66c55c43819a75be681574b291de (diff) | |
download | external_llvm-3e883734fab4da8413f16957dd116d4ffd9d3223.zip external_llvm-3e883734fab4da8413f16957dd116d4ffd9d3223.tar.gz external_llvm-3e883734fab4da8413f16957dd116d4ffd9d3223.tar.bz2 |
During the CodeGenPrepare we often lower intrinsics (such as objsize)
and allow some optimizations to turn conditional branches into unconditional.
This commit adds a simple control-flow optimization which merges two consecutive
basic blocks which are connected by a single edge. This allows the codegen to
operate on larger basic blocks.
rdar://11973998
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161852 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/LoopStrengthReduce/ARM')
-rw-r--r-- | test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll index 70ead33..b5124ea 100644 --- a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll +++ b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll @@ -44,7 +44,7 @@ declare %s* @getstruct() nounwind ; CHECK: @main ; Check that the loop preheader contains no address computation. -; CHECK: %entry +; CHECK: %end_of_chain ; CHECK-NOT: add{{.*}}lsl ; CHECK: ldr{{.*}}lsl #2 ; CHECK: ldr{{.*}}lsl #2 @@ -65,15 +65,15 @@ while.cond: while.body: %v3 = load i32* @ncol, align 4, !tbaa !0 - br label %while.cond.i + br label %end_of_chain -while.cond.i: +end_of_chain: %state.i = getelementptr inbounds %s* %call18, i32 0, i32 0 %v4 = load i32** %state.i, align 4, !tbaa !3 br label %while.cond.i.i while.cond.i.i: - %counter.0.i.i = phi i32 [ %v3, %while.cond.i ], [ %dec.i.i, %land.rhs.i.i ] + %counter.0.i.i = phi i32 [ %v3, %end_of_chain ], [ %dec.i.i, %land.rhs.i.i ] %dec.i.i = add nsw i32 %counter.0.i.i, -1 %tobool.i.i = icmp eq i32 %counter.0.i.i, 0 br i1 %tobool.i.i, label %where.exit, label %land.rhs.i.i |