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authorPirama Arumuga Nainar <pirama@google.com>2015-04-10 22:08:18 +0000
committerAndroid Git Automerger <android-git-automerger@android.com>2015-04-10 22:08:18 +0000
commit13a7db5b9c4f5e543d037be68ec3428216bfd550 (patch)
tree1b2c9792582e12f5af0b1512e3094425f0dc0df9 /test/Transforms/LoopVectorize/cpp-new-array.ll
parent0eb46f5d1e06a4284663d636a74b06adc3a161d7 (diff)
parent31195f0bdca6ee2a5e72d07edf13e1d81206d949 (diff)
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am 31195f0b: Merge "Update aosp/master llvm for rebase to r233350"
* commit '31195f0bdca6ee2a5e72d07edf13e1d81206d949': Update aosp/master llvm for rebase to r233350
Diffstat (limited to 'test/Transforms/LoopVectorize/cpp-new-array.ll')
-rw-r--r--test/Transforms/LoopVectorize/cpp-new-array.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/test/Transforms/LoopVectorize/cpp-new-array.ll b/test/Transforms/LoopVectorize/cpp-new-array.ll
index f32f610..22896d3 100644
--- a/test/Transforms/LoopVectorize/cpp-new-array.ll
+++ b/test/Transforms/LoopVectorize/cpp-new-array.ll
@@ -24,21 +24,21 @@ entry:
for.body: ; preds = %entry, %for.body
%i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
%idxprom = sext i32 %i.01 to i64
- %arrayidx = getelementptr inbounds float* %0, i64 %idxprom
- %3 = load float* %arrayidx, align 4
+ %arrayidx = getelementptr inbounds float, float* %0, i64 %idxprom
+ %3 = load float, float* %arrayidx, align 4
%idxprom5 = sext i32 %i.01 to i64
- %arrayidx6 = getelementptr inbounds float* %1, i64 %idxprom5
- %4 = load float* %arrayidx6, align 4
+ %arrayidx6 = getelementptr inbounds float, float* %1, i64 %idxprom5
+ %4 = load float, float* %arrayidx6, align 4
%add = fadd float %3, %4
%idxprom7 = sext i32 %i.01 to i64
- %arrayidx8 = getelementptr inbounds float* %2, i64 %idxprom7
+ %arrayidx8 = getelementptr inbounds float, float* %2, i64 %idxprom7
store float %add, float* %arrayidx8, align 4
%inc = add nsw i32 %i.01, 1
%cmp = icmp slt i32 %inc, 1000
br i1 %cmp, label %for.body, label %for.end
for.end: ; preds = %for.body
- %5 = load float* %2, align 4
+ %5 = load float, float* %2, align 4
%conv10 = fptosi float %5 to i32
ret i32 %conv10
}