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| author | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-06-04 22:49:04 +0000 |
| commit | ae3a0be92e33bc716722aa600983fc1535acb122 (patch) | |
| tree | 768333097a76cc105813c7c636daf6259e6a0fc7 /test/Transforms/Mem2Reg | |
| parent | d18e31ae17390d9c6f6cf93d18badf962452031d (diff) | |
| download | external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.zip external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.gz external_llvm-ae3a0be92e33bc716722aa600983fc1535acb122.tar.bz2 | |
Split the Add, Sub, and Mul instruction opcodes into separate
integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/Transforms/Mem2Reg')
| -rw-r--r-- | test/Transforms/Mem2Reg/PromoteMemToRegister.ll | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/test/Transforms/Mem2Reg/PromoteMemToRegister.ll b/test/Transforms/Mem2Reg/PromoteMemToRegister.ll index fdc33fb..63b8c78 100644 --- a/test/Transforms/Mem2Reg/PromoteMemToRegister.ll +++ b/test/Transforms/Mem2Reg/PromoteMemToRegister.ll @@ -12,7 +12,7 @@ define double @testfunc(i32 %i, double %j) { %t3 = load i32* %I ; <i32> [#uses=1] %t4 = sitofp i32 %t3 to double ; <double> [#uses=1] %t5 = load double* %J ; <double> [#uses=1] - %t6 = mul double %t4, %t5 ; <double> [#uses=1] + %t6 = fmul double %t4, %t5 ; <double> [#uses=1] ret double %t6 } |