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authorRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-11-26 10:58:52 +0000
committerRichard Sandiford <rsandifo@linux.vnet.ibm.com>2013-11-26 10:58:52 +0000
commit86a735396ab4804a06e76d1b4ce49dbd44c35827 (patch)
treebea1b55d752b8ea185ff789b05fde939d989f969 /test/Unit
parent8a0ff1f236e77214878c9d493e786b30656ad2a1 (diff)
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Merging r195731:
------------------------------------------------------------------------ r195731 | rsandifo | 2013-11-26 10:53:16 +0000 (Tue, 26 Nov 2013) | 7 lines [SystemZ] Fix incorrect use of RISBG for a zero-extended right shift We would wrongly transform the testcase into the equivalent of an AND with 1. The problem was that, when testing whether the shifted-in bits of the right shift were significant, we used the width of the final zero-extended result rather than the width of the shifted value. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195736 91177308-0d34-0410-b5e6-96231b3b80d8
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