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| author | Johnny Chen <johnny.chen@apple.com> | 2009-11-07 00:54:36 +0000 |
|---|---|---|
| committer | Johnny Chen <johnny.chen@apple.com> | 2009-11-07 00:54:36 +0000 |
| commit | 0430152a11ccf5f6079d97c519b4a86dd49739e7 (patch) | |
| tree | 04d7a21b4b9bf420e171ffc8f538581e448c7cb2 /test | |
| parent | 631f3c0dfdf21b0702fcd9baa4ce79ec9ab360dc (diff) | |
| download | external_llvm-0430152a11ccf5f6079d97c519b4a86dd49739e7.zip external_llvm-0430152a11ccf5f6079d97c519b4a86dd49739e7.tar.gz external_llvm-0430152a11ccf5f6079d97c519b4a86dd49739e7.tar.bz2 | |
My previous patch (r84124) for setting the encoding bits 4 and 7 of DPSoRegFrm
was wrong and too aggressive in the sense that DPSoRegFrm includes both constant
shifts (with Inst{4} = 0) and register controlled shifts (with Inst{4} = 1 and
Inst{7} = 0). The 'rr' fragment of the multiclass definitions actually means
register/register with no shift, see A8-11.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86319 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
0 files changed, 0 insertions, 0 deletions