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author | Reed Kotler <rkotler@mips.com> | 2013-11-15 02:21:52 +0000 |
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committer | Reed Kotler <rkotler@mips.com> | 2013-11-15 02:21:52 +0000 |
commit | 1703a714954f9ef0c32415423e2a1e15b152e711 (patch) | |
tree | 495d552da645e0867a074606d6c840c4807ddde5 /test | |
parent | 7b641815290f34f0212e4cb7b26ed1708270cb97 (diff) | |
download | external_llvm-1703a714954f9ef0c32415423e2a1e15b152e711.zip external_llvm-1703a714954f9ef0c32415423e2a1e15b152e711.tar.gz external_llvm-1703a714954f9ef0c32415423e2a1e15b152e711.tar.bz2 |
Make all the conditional Mips 16 branches get initially set for the
short form. Constant islands will expand them if they are out of range.
Since there is not direct object emitter at this time, it does not
have any material affect because the assembler sorts this out. But we
need to know for the actual constant island work. We track the difference
by putting # 16 inst in the comments.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194766 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/Mips/beqzc.ll | 20 | ||||
-rw-r--r-- | test/CodeGen/Mips/beqzc1.ll | 24 | ||||
-rw-r--r-- | test/CodeGen/Mips/sel1c.ll | 21 | ||||
-rw-r--r-- | test/CodeGen/Mips/sel2c.ll | 21 |
4 files changed, 86 insertions, 0 deletions
diff --git a/test/CodeGen/Mips/beqzc.ll b/test/CodeGen/Mips/beqzc.ll new file mode 100644 index 0000000..4a294c2 --- /dev/null +++ b/test/CodeGen/Mips/beqzc.ll @@ -0,0 +1,20 @@ +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=cond-b-short + +@i = global i32 0, align 4 +@j = common global i32 0, align 4 + +; Function Attrs: nounwind optsize +define i32 @main() #0 { +entry: + %0 = load i32* @i, align 4 + %cmp = icmp eq i32 %0, 0 + %. = select i1 %cmp, i32 10, i32 55 + store i32 %., i32* @j, align 4 +; cond-b-short: beqz ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst + ret i32 0 +} + +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } + + + diff --git a/test/CodeGen/Mips/beqzc1.ll b/test/CodeGen/Mips/beqzc1.ll new file mode 100644 index 0000000..8f929a8 --- /dev/null +++ b/test/CodeGen/Mips/beqzc1.ll @@ -0,0 +1,24 @@ +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=cond-b-short + +@i = global i32 0, align 4 +@j = common global i32 0, align 4 + +; Function Attrs: nounwind optsize +define i32 @main() #0 { +entry: + %0 = load i32* @i, align 4 + %cmp = icmp eq i32 %0, 0 + br i1 %cmp, label %if.then, label %if.end + +; cond-b-short: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst +if.then: ; preds = %entry + store i32 10, i32* @j, align 4 + br label %if.end + +if.end: ; preds = %if.then, %entry + ret i32 0 +} + +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } + + diff --git a/test/CodeGen/Mips/sel1c.ll b/test/CodeGen/Mips/sel1c.ll new file mode 100644 index 0000000..4c4784d --- /dev/null +++ b/test/CodeGen/Mips/sel1c.ll @@ -0,0 +1,21 @@ +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=cond-b-short + +@i = global i32 1, align 4 +@j = global i32 2, align 4 +@k = common global i32 0, align 4 + +; Function Attrs: nounwind optsize +define void @t() #0 { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @j, align 4 + %cmp = icmp eq i32 %0, %1 + %cond = select i1 %cmp, i32 1, i32 2 + store i32 %cond, i32* @k, align 4 + ret void +; cond-b-short: bteqz $BB0_{{[0-9]+}} # 16 bit inst +} + +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } + + diff --git a/test/CodeGen/Mips/sel2c.ll b/test/CodeGen/Mips/sel2c.ll new file mode 100644 index 0000000..25dfaa9 --- /dev/null +++ b/test/CodeGen/Mips/sel2c.ll @@ -0,0 +1,21 @@ +; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -soft-float -mips16-hard-float -relocation-model=pic -mips16-constant-islands < %s | FileCheck %s -check-prefix=cond-b-short + +@i = global i32 1, align 4 +@j = global i32 2, align 4 +@k = common global i32 0, align 4 + +; Function Attrs: nounwind optsize +define void @t() #0 { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @j, align 4 + %cmp = icmp ne i32 %0, %1 + %cond = select i1 %cmp, i32 1, i32 2 + store i32 %cond, i32* @k, align 4 +; cond-b-short: btnez $BB0_{{[0-9]+}} # 16 bit inst + ret void +} + +attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="true" } + + |