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| author | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-05 22:54:59 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2013-03-05 22:54:59 +0000 |
| commit | 1e3e869899468de2210f9777905340d907c814c6 (patch) | |
| tree | 52bfb15637677eceec872a9ed96ab166dedf7939 /test | |
| parent | 7433b2e1142a46c1dbb491d91e0175cb9ce83167 (diff) | |
| download | external_llvm-1e3e869899468de2210f9777905340d907c814c6.zip external_llvm-1e3e869899468de2210f9777905340d907c814c6.tar.gz external_llvm-1e3e869899468de2210f9777905340d907c814c6.tar.bz2 | |
[mips] Fix MipsCC::analyzeReturn so that, in soft-float mode, fp128 gets
returned in registers $2 and $4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176527 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/Mips/mips64-f128.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/Mips/mips64-f128.ll b/test/CodeGen/Mips/mips64-f128.ll index 2a84c84..5892cab 100644 --- a/test/CodeGen/Mips/mips64-f128.ll +++ b/test/CodeGen/Mips/mips64-f128.ll @@ -236,7 +236,7 @@ entry: ; CHECK: daddiu $[[R1:[0-9]+]], $zero, 1 ; CHECK: dsll $[[R2:[0-9]+]], $[[R1]], 63 ; CHECK: daddiu $[[R3:[0-9]+]], $[[R2]], -1 -; CHECK: and $3, $[[R0]], $[[R3]] +; CHECK: and $4, $[[R0]], $[[R3]] ; CHECK: ld $2, 0($[[R4]]) define fp128 @libcall1_fabsl() { @@ -413,7 +413,7 @@ declare fp128 @llvm.powi.f128(fp128, i32) #3 ; CHECK: ld $[[R6:[0-9]+]], 8($[[R5]]) ; CHECK: daddiu $[[R7:[0-9]+]], $[[R3]], -1 ; CHECK: and $[[R8:[0-9]+]], $[[R6]], $[[R7]] -; CHECK: or $3, $[[R8]], $[[R4]] +; CHECK: or $4, $[[R8]], $[[R4]] ; CHECK: ld $2, 0($[[R5]]) define fp128 @libcall2_copysignl() { @@ -529,7 +529,7 @@ entry: ; CHECK: load_LD_LD: ; CHECK: ld $[[R0:[0-9]+]], %got_disp(gld1) ; CHECK: ld $2, 0($[[R0]]) -; CHECK: ld $3, 8($[[R0]]) +; CHECK: ld $4, 8($[[R0]]) define fp128 @load_LD_LD() { entry: @@ -616,7 +616,7 @@ entry: ; CHECK: movn $8, $6, $4 ; CHECK: movn $9, $7, $4 ; CHECK: move $2, $8 -; CHECK: move $3, $9 +; CHECK: move $4, $9 define fp128 @select_LD(i32 %a, i64, fp128 %b, fp128 %c) { entry: @@ -636,7 +636,7 @@ entry: ; CHECK: movz $[[R1]], $[[R3]], $1 ; CHECK: movz $[[R0]], $[[R2]], $1 ; CHECK: move $2, $[[R1]] -; CHECK: move $3, $[[R0]] +; CHECK: move $4, $[[R0]] define fp128 @selectCC_LD(fp128 %a, fp128 %b, fp128 %c, fp128 %d) { entry: |