diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2009-10-21 08:15:52 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2009-10-21 08:15:52 +0000 |
| commit | 2095659a8551fb222d145bc8dfa6cf5d15048e42 (patch) | |
| tree | 8788a1c1389492e0a8c74e227d0e48e53e7ff685 /test | |
| parent | 5affca0763836e15ca15e78ed3a0fd56ef6b2e92 (diff) | |
| download | external_llvm-2095659a8551fb222d145bc8dfa6cf5d15048e42.zip external_llvm-2095659a8551fb222d145bc8dfa6cf5d15048e42.tar.gz external_llvm-2095659a8551fb222d145bc8dfa6cf5d15048e42.tar.bz2 | |
Match more patterns to movt.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84751 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/ARM/movt.ll | 19 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-mov2.ll | 20 |
2 files changed, 23 insertions, 16 deletions
diff --git a/test/CodeGen/ARM/movt.ll b/test/CodeGen/ARM/movt.ll new file mode 100644 index 0000000..e82aca0 --- /dev/null +++ b/test/CodeGen/ARM/movt.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -march=arm -mattr=+thumb2 | FileCheck %s +; rdar://7317664 + +define i32 @t(i32 %X) nounwind { +; CHECK: t: +; CHECK: movt r0, #65535 +entry: + %0 = or i32 %X, -65536 + ret i32 %0 +} + +define i32 @t2(i32 %X) nounwind { +; CHECK: t2: +; CHECK: movt r0, #65534 +entry: + %0 = or i32 %X, -131072 + %1 = and i32 %0, -65537 + ret i32 %1 +} diff --git a/test/CodeGen/Thumb2/thumb2-mov2.ll b/test/CodeGen/Thumb2/thumb2-mov2.ll index a02f4f0..32d0075 100644 --- a/test/CodeGen/Thumb2/thumb2-mov2.ll +++ b/test/CodeGen/Thumb2/thumb2-mov2.ll @@ -2,10 +2,7 @@ define i32 @t2MOVTi16_ok_1(i32 %a) { ; CHECK: t2MOVTi16_ok_1: -; CHECK: movs r1, #0 -; CHECK-NEXT: movt r1, #1234 -; CHECK: movw r1, #65535 -; CHECK-NEXT: movt r1, #1234 +; CHECK: movt r0, #1234 %1 = and i32 %a, 65535 %2 = shl i32 1234, 16 %3 = or i32 %1, %2 @@ -15,10 +12,7 @@ define i32 @t2MOVTi16_ok_1(i32 %a) { define i32 @t2MOVTi16_test_1(i32 %a) { ; CHECK: t2MOVTi16_test_1: -; CHECK: movs r1, #0 -; CHECK-NEXT: movt r1, #1234 -; CHECK: movw r1, #65535 -; CHECK-NEXT: movt r1, #1234 +; CHECK: movt r0, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3 @@ -31,10 +25,7 @@ define i32 @t2MOVTi16_test_1(i32 %a) { define i32 @t2MOVTi16_test_2(i32 %a) { ; CHECK: t2MOVTi16_test_2: -; CHECK: movs r1, #0 -; CHECK-NEXT: movt r1, #1234 -; CHECK: movw r1, #65535 -; CHECK-NEXT: movt r1, #1234 +; CHECK: movt r0, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3 @@ -48,10 +39,7 @@ define i32 @t2MOVTi16_test_2(i32 %a) { define i32 @t2MOVTi16_test_3(i32 %a) { ; CHECK: t2MOVTi16_test_3: -; CHECK: movs r1, #0 -; CHECK-NEXT: movt r1, #1234 -; CHECK: movw r1, #65535 -; CHECK-NEXT: movt r1, #1234 +; CHECK: movt r0, #1234 %1 = shl i32 255, 8 %2 = shl i32 1234, 8 %3 = or i32 %1, 255 ; This give us 0xFFFF in %3 |