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author | Mon P Wang <wangmp@apple.com> | 2008-06-25 08:15:39 +0000 |
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committer | Mon P Wang <wangmp@apple.com> | 2008-06-25 08:15:39 +0000 |
commit | 28873106309db515d58889a4c4fa3e0a92d1b60e (patch) | |
tree | 55754230852c1d76c8058edec38ed42a47b3ddc7 /test | |
parent | ea9e516e86b3a6ca1b3a5b374365735e1cca414d (diff) | |
download | external_llvm-28873106309db515d58889a4c4fa3e0a92d1b60e.zip external_llvm-28873106309db515d58889a4c4fa3e0a92d1b60e.tar.gz external_llvm-28873106309db515d58889a4c4fa3e0a92d1b60e.tar.bz2 |
Added MemOperands to Atomic operations since Atomics touches memory.
Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52706 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
-rw-r--r-- | test/CodeGen/PowerPC/atomic-1.ll | 12 | ||||
-rw-r--r-- | test/CodeGen/PowerPC/atomic-2.ll | 8 | ||||
-rw-r--r-- | test/CodeGen/X86/atomic_op.ll | 18 |
3 files changed, 19 insertions, 19 deletions
diff --git a/test/CodeGen/PowerPC/atomic-1.ll b/test/CodeGen/PowerPC/atomic-1.ll index 74b9c6a..e588b2f 100644 --- a/test/CodeGen/PowerPC/atomic-1.ll +++ b/test/CodeGen/PowerPC/atomic-1.ll @@ -2,17 +2,17 @@ ; RUN: llvm-as < %s | llc -march=ppc32 | grep stwcx. | count 4 define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind { - %tmp = call i32 @llvm.atomic.las.i32( i32* %mem, i32 %val ) + %tmp = call i32 @llvm.atomic.load.add.i32( i32* %mem, i32 %val ) ret i32 %tmp } define i32 @exchange_and_cmp(i32* %mem) nounwind { - %tmp = call i32 @llvm.atomic.lcs.i32( i32* %mem, i32 0, i32 1 ) + %tmp = call i32 @llvm.atomic.cmp.swap.i32( i32* %mem, i32 0, i32 1 ) ret i32 %tmp } define i16 @exchange_and_cmp16(i16* %mem) nounwind { - %tmp = call i16 @llvm.atomic.lcs.i16( i16* %mem, i16 0, i16 1 ) + %tmp = call i16 @llvm.atomic.cmp.swap.i16( i16* %mem, i16 0, i16 1 ) ret i16 %tmp } @@ -21,7 +21,7 @@ define i32 @exchange(i32* %mem, i32 %val) nounwind { ret i32 %tmp } -declare i32 @llvm.atomic.las.i32(i32*, i32) nounwind -declare i32 @llvm.atomic.lcs.i32(i32*, i32, i32) nounwind -declare i16 @llvm.atomic.lcs.i16(i16*, i16, i16) nounwind +declare i32 @llvm.atomic.load.add.i32(i32*, i32) nounwind +declare i32 @llvm.atomic.cmp.swap.i32(i32*, i32, i32) nounwind +declare i16 @llvm.atomic.cmp.swap.i16(i16*, i16, i16) nounwind declare i32 @llvm.atomic.swap.i32(i32*, i32) nounwind diff --git a/test/CodeGen/PowerPC/atomic-2.ll b/test/CodeGen/PowerPC/atomic-2.ll index 8e1ef1b..2c7e221 100644 --- a/test/CodeGen/PowerPC/atomic-2.ll +++ b/test/CodeGen/PowerPC/atomic-2.ll @@ -2,12 +2,12 @@ ; RUN: llvm-as < %s | llc -march=ppc64 | grep stdcx. | count 3 define i64 @exchange_and_add(i64* %mem, i64 %val) nounwind { - %tmp = call i64 @llvm.atomic.las.i64( i64* %mem, i64 %val ) + %tmp = call i64 @llvm.atomic.load.add.i64( i64* %mem, i64 %val ) ret i64 %tmp } define i64 @exchange_and_cmp(i64* %mem) nounwind { - %tmp = call i64 @llvm.atomic.lcs.i64( i64* %mem, i64 0, i64 1 ) + %tmp = call i64 @llvm.atomic.cmp.swap.i64( i64* %mem, i64 0, i64 1 ) ret i64 %tmp } @@ -16,6 +16,6 @@ define i64 @exchange(i64* %mem, i64 %val) nounwind { ret i64 %tmp } -declare i64 @llvm.atomic.las.i64(i64*, i64) nounwind -declare i64 @llvm.atomic.lcs.i64(i64*, i64, i64) nounwind +declare i64 @llvm.atomic.load.add.i64(i64*, i64) nounwind +declare i64 @llvm.atomic.cmp.swap.i64(i64*, i64, i64) nounwind declare i64 @llvm.atomic.swap.i64(i64*, i64) nounwind diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll index 4687da1..a070f96 100644 --- a/test/CodeGen/X86/atomic_op.ll +++ b/test/CodeGen/X86/atomic_op.ll @@ -29,13 +29,13 @@ entry: store i32 3855, i32* %xort store i32 4, i32* %temp %tmp = load i32* %temp ; <i32> [#uses=1] - call i32 @llvm.atomic.las.i32( i32* %val1, i32 %tmp ) ; <i32>:0 [#uses=1] + call i32 @llvm.atomic.load.add.i32( i32* %val1, i32 %tmp ) ; <i32>:0 [#uses=1] store i32 %0, i32* %old - call i32 @llvm.atomic.lss.i32( i32* %val2, i32 30 ) ; <i32>:1 [#uses=1] + call i32 @llvm.atomic.load.sub.i32( i32* %val2, i32 30 ) ; <i32>:1 [#uses=1] store i32 %1, i32* %old - call i32 @llvm.atomic.las.i32( i32* %val2, i32 1 ) ; <i32>:2 [#uses=1] + call i32 @llvm.atomic.load.add.i32( i32* %val2, i32 1 ) ; <i32>:2 [#uses=1] store i32 %2, i32* %old - call i32 @llvm.atomic.lss.i32( i32* %val2, i32 1 ) ; <i32>:3 [#uses=1] + call i32 @llvm.atomic.load.sub.i32( i32* %val2, i32 1 ) ; <i32>:3 [#uses=1] store i32 %3, i32* %old call i32 @llvm.atomic.load.and.i32( i32* %andt, i32 4080 ) ; <i32>:4 [#uses=1] store i32 %4, i32* %old @@ -63,16 +63,16 @@ entry: call i32 @llvm.atomic.swap.i32( i32* %val2, i32 1976 ) ; <i32>:15 [#uses=1] store i32 %15, i32* %old %neg1 = sub i32 0, 10 ; <i32> [#uses=1] - call i32 @llvm.atomic.lcs.i32( i32* %val2, i32 %neg1, i32 1 ) ; <i32>:16 [#uses=1] + call i32 @llvm.atomic.cmp.swap.i32( i32* %val2, i32 %neg1, i32 1 ) ; <i32>:16 [#uses=1] store i32 %16, i32* %old - call i32 @llvm.atomic.lcs.i32( i32* %val2, i32 1976, i32 1 ) ; <i32>:17 [#uses=1] + call i32 @llvm.atomic.cmp.swap.i32( i32* %val2, i32 1976, i32 1 ) ; <i32>:17 [#uses=1] store i32 %17, i32* %old ret void } -declare i32 @llvm.atomic.las.i32(i32*, i32) nounwind +declare i32 @llvm.atomic.load.add.i32(i32*, i32) nounwind -declare i32 @llvm.atomic.lss.i32(i32*, i32) nounwind +declare i32 @llvm.atomic.load.sub.i32(i32*, i32) nounwind declare i32 @llvm.atomic.load.and.i32(i32*, i32) nounwind @@ -90,4 +90,4 @@ declare i32 @llvm.atomic.load.umin.i32(i32*, i32) nounwind declare i32 @llvm.atomic.swap.i32(i32*, i32) nounwind -declare i32 @llvm.atomic.lcs.i32(i32*, i32, i32) nounwind +declare i32 @llvm.atomic.cmp.swap.i32(i32*, i32, i32) nounwind |